OLED Pixel Storage Capacitor Design for Voltage Stability
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Solution Overview
Problem
As the resolution of organic light emitting display devices increases, it becomes challenging to design space for the pixel circuit, particularly in maintaining the voltage of the data signal stored in the storage capacitor while securing sufficient capacity, leading to issues like voltage fluctuation and cross-talk phenomena due to reduced design space.
Innovation Solution
The pixel design includes a storage capacitor with a semiconductor layer expanded to overlap with the data line, a first conductive layer covering the semiconductor layer where it overlaps with the data line, and a second conductive layer coupled to the first power supply, effectively securing capacitor capacity and stabilizing the data signal voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of the display device is increased, then the image quality is improved, but the design space for the pixel circuit is reduced
Solution Approach 1:
The semiconductor layer is extended in the vertical dimension to overlap with the data line, creating a three-dimensional capacitor structure. This allows the storage capacitor to utilize vertical space rather than only horizontal plane area, effectively increasing storage capacity within the constrained pixel circuit area.
Solution Approach 2:
The storage capacitor is nested within the pixel circuit structure by positioning its semiconductor layer to overlap with the data line. The capacitor's first conductive layer is embedded between the data line and the semiconductor layer, creating a compact nested arrangement that maximizes space utilization.
2Measurement precision
If the design space is reduced, then the resolution is improved, but the capacity of the storage capacitor is insufficient
Solution Approach 1:
The storage capacitor achieves increased capacity by extending into the vertical dimension through overlapping layers. The semiconductor layer overlaps with the data line in the vertical direction, and the first conductive layer is positioned between them, creating a capacitor structure that utilizes three-dimensional space to achieve sufficient capacity within limited area.
Solution Approach 2:
The first conductive layer is pre-positioned between the data line and the semiconductor layer during fabrication. This preliminary placement ensures that the capacitor structure is already optimized for maximum capacity before final assembly, allowing sufficient storage capacity to be achieved within the constrained design space.
3Measurement precision
If the design space is reduced, then the resolution is improved, but the voltage stability of the data signal is degraded
Solution Approach 1:
The first conductive layer is extracted and positioned specifically between the data line and the semiconductor layer to serve as a shielding layer. This separated positioning isolates the data line from electrical interference with the storage capacitor, preventing cross-talk and maintaining voltage stability despite the reduced design space.
Solution Approach 2:
The first conductive layer acts as an intermediary shielding layer between the data line and the semiconductor layer. It mediates the electrical interaction by blocking parasitic capacitance and cross-talk, thereby maintaining voltage stability of the data signal while allowing the compact overlapping structure to be implemented.
Data Source
AI summary
A pixel including: an organic light emitting diode that is coupled between a first power supply and a second power supply; a first transistor that is coupled between the first power supply and the organic light emitting diode and whose gate is connected to a first node; a second transistor that is coupled between the first node and a data line and whose gate electrode is coupled to a scan line; and a storage capacitor whose first electrode is coupled to the first node and second electrode is coupled to the first power supply, wherein the storage capacitor includes: a semiconductor layer that is positioned on a different layer from that of the data line and that expands to a region where the semiconductor layer overlaps with the data line and constitutes the first electrode, a first dielectric layer that is formed on the semiconductor layer, a first conductive layer that is formed on the first dielectric layer and constitutes the second electrode, a second dielectric layer that is formed on the first conductive layer, and a second conductive layer that is formed on the second dielectric layer and constitutes the first electrode together with the semiconductor layer, the first conductive layer being positioned between the data line and the semiconductor layer in order to cover the upper part of the region where it overlaps with the data line of the semiconductor layer.