OLED Pixel Circuit With Threshold Sensing for Luminance Uniformity

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Solution Overview

Problem

Display devices with organic light emitting diodes (OLEDs) experience luminance deviations due to varying threshold voltages of driving transistors, leading to image quality degradation, especially in high-resolution displays where threshold voltage compensation periods are shortened.

Innovation Solution

A pixel circuit design incorporating n-channel and p-channel MOS transistors, with separate threshold voltage sensing and data writing periods, allowing for a longer threshold voltage sensing period and reduced image quality degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the resolution of the display device is increased, then the display quality is improved, but the threshold voltage compensation period is shortened, resulting in degraded image quality

Engineering Contradiction:
Improvedisplay resolutionVSAvoidimage quality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The pixel circuit is divided into multiple functional units: a driving transistor for current control, a switching transistor for data input, a compensation transistor for threshold voltage compensation, and storage capacitors for voltage retention. This segmentation allows each unit to perform its function efficiently, enabling adequate compensation time even in high-resolution displays with shortened frame periods.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The compensation transistor performs threshold voltage compensation in advance during a dedicated compensation period before the emission period. By measuring and compensating the threshold voltage of the driving transistor beforehand, the circuit ensures accurate driving current regardless of transistor variations, maintaining image quality in high-resolution displays where time is constrained.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the threshold voltage compensation period is shortened, then the productivity is improved, but the measurement precision of threshold voltage is reduced, leading to luminance deviations

Engineering Contradiction:
Improvecompensation speedVSAvoidthreshold voltage compensation accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The compensation transistor forms a feedback loop with the driving transistor and storage capacitor. During the compensation period, the compensation transistor measures the threshold voltage of the driving transistor by comparing voltages across the storage capacitor, and automatically adjusts the stored voltage to compensate for the threshold variation. This feedback mechanism ensures accurate compensation even with shortened compensation periods.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The pixel circuit performs self-compensation using its own internal components without requiring external intervention. The compensation transistor, storage capacitor, and driving transistor work together in an integrated manner where the circuit automatically measures and corrects its own threshold voltage variations, achieving both speed and accuracy in the compensation process.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUSRE50831E1Pixel and display device including the same
Publication Date: 2026.03.17 SAMSUNG DISPLAY CO LTD
  • USRE50831E1 patent drawing
  • USRE50831E1 patent drawing
  • USRE50831E1 patent drawing

AI summary

A pixel, wherein: gates of second and fifth transistors receive a first gate signal; gates of third and fourth transistors respectively receive second and third gate signals; first terminals (FTs) of the second to fifth transistors respectively receive a data voltage, reference voltage, initialization voltage, and first power supply voltage (PSV); a second electrode of a second capacitor receives the first PSV; a second terminal (ST) of a light emitting element (LEE) receives a second PSV; a gate of a first transistor, STs of the second and third transistors, and a first electrode of a first capacitor are connected to a first node; STs of the first and fourth transistors, a FT of the LEE, and second and first electrodes respectively of the first and second capacitors are connected to a second node; and a ST of the fifth transistor is connected to a FT of the first transistor.