OLED Pixel Wiring Layout for High Resolution and Opening Ratio
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Solution Overview
Problem
Existing organic light-emitting display apparatuses face a decrease in opening ratio and lowered luminous quality due to increased resolution, which is caused by the increased loads on wirings.
Innovation Solution
The display apparatus includes a substrate with a specific arrangement of data wiring units, driving voltage lines, and pixel electrodes, along with storage capacitors and TFTs, optimized to minimize overlap and maximize space utilization, thereby reducing load on wirings and enhancing luminous quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If resolution of display apparatus is increased, then display quality is improved, but opening ratio is decreased and luminous quality is lowered due to increased loads on wirings
Solution Approach 1:
The patent transitions from conventional planar wiring arrangements to a three-dimensional stacked architecture where data lines, storage capacitors, and pixel electrodes are arranged in multiple vertical layers. This dimensional change allows wirings to be routed through the vertical space rather than only horizontally, reducing the lateral load on wirings and enabling higher resolution without sacrificing opening ratio or luminous quality.
Solution Approach 2:
The patent implements a nested structure where storage capacitors are positioned between data lines and pixel electrodes in the vertical dimension, and where multiple functional layers are stacked within the same planar footprint. This nesting allows compact arrangement of components, reducing the overall area required for high-resolution displays while maintaining adequate spacing for light emission.
2Measurement precision
If resolution of display apparatus is increased, then display quality is improved, but opening ratio is decreased due to pixel arrangement
Solution Approach 1:
By stacking data lines, storage capacitors, and pixel electrodes in vertical layers, the patent utilizes the third dimension to accommodate high-resolution pixel arrangements without increasing the lateral footprint. This allows smaller pixel pitch for higher resolution while maintaining adequate opening ratio through optimized vertical spacing and interlayer positioning.
Solution Approach 2:
The patent employs asymmetric positioning of components within the pixel structure, particularly in the arrangement of data lines and storage capacitors relative to pixel electrodes. This asymmetric layout optimizes the distribution of conductive elements and insulating materials, enabling higher resolution with improved opening ratio by efficiently utilizing available space in both planar and vertical dimensions.
Data Source
AI summary
A display apparatus having an opening ratio that provides a high resolution and improved luminous quality and including: a substrate; a first driving thin-film transistor (TFT) and a first storage capacitor, the first storage capacitor for emitting light of a first color and on the substrate; a data wiring unit including a first data line, a second data line, and a third data line, at a first side of the first storage capacitor, extending along a first direction and spaced apart from one another along a second direction, intersecting the first direction, by a predetermined distance; a driving voltage line at a second side of the first storage capacitor and extending along the first direction; and a first pixel electrode electrically connected to the first driving TFT.