OLED Planarization Layer Roughness Reduction

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Solution Overview

Problem

The dry etching process in the fabrication of organic light emitting diode (OLED) display devices causes damage to the planarization layer, leading to increased roughness, which results in decreased reflectivity and variation of color coordinates due to scattered reflection.

Innovation Solution

The method involves annealing and curing the planarization layer after forming a first extension of a via-hole, followed by dry etching the passivation layer to form a second extension of the via-hole, and providing an ashing treatment and surface treatment to the planarization layer to reduce roughness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dry etching is performed on the passivation layer using the planarization layer as a mask, then via-holes are formed to connect the pixel electrode to the source/drain electrodes, but the planarization layer becomes damaged and rough due to direct contact with plasma

Engineering Contradiction:
Improvevia-hole formation precisionVSAvoidplanarization layer integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

An additional mask layer (photoresist or hard mask) is introduced between the planarization layer and the plasma during dry etching. This intermediary layer protects the planarization layer from direct plasma damage while still allowing precise via-hole formation through controlled etching of the mask layer and underlying passivation layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The planarization layer undergoes preliminary annealing treatment before the dry etching process. This pre-treatment strengthens the planarization layer's resistance to plasma damage, preventing roughness formation during subsequent via-hole etching while maintaining the ability to form precise via-holes.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the planarization layer is directly exposed to plasma during dry etching, then via-holes are formed, but the roughness of the planarization layer increases leading to scattered reflection

Engineering Contradiction:
Improvevia-hole formation efficiencyVSAvoidsurface flatness of planarization layer
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

A sacrificial mask layer is placed between the plasma and the planarization layer during dry etching. This mask layer absorbs the plasma damage, allowing efficient via-hole formation through the passivation layer while the planarization layer remains protected and maintains its surface flatness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The plasma that would normally damage the planarization layer is redirected to etch a sacrificial mask layer instead. The harmful plasma energy is converted into a useful function of removing the mask material, while the planarization layer emerges undamaged and smooth.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Manufacturing precision

If annealing and curing treatments are applied to the planarization layer, then roughness is reduced and reflectivity is improved, but the fabrication process time increases

Engineering Contradiction:
Improvesurface flatness and reflectivityVSAvoidfabrication process duration
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The annealing and curing treatments for the planarization layer are combined with existing fabrication process steps, such as integrating them with the passivation layer formation or pixel electrode deposition process. This consolidation reduces the total process time while still achieving the desired surface flatness and reflectivity improvement.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The annealing temperature, duration, and atmospheric conditions are optimized to achieve the required surface flatness and reflectivity in the shortest possible time. By adjusting these parameters, the process maintains high manufacturing precision while minimizing time loss.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the roughness of the planarization layer, thereby minimizing issues such as decreased reflectivity and color coordinate variation in OLED display devices.

Implementation Method 1

annealing and curing the planarization layer after forming a first extension of a via hole

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

The via-hole may be dry etched using the planarization layer as a mask

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 3

providing an ashing treatment to the planarization layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS7867797B2Method of fabricating organic light emitting diode display device
Publication Date: 2011.01.11 SAMSUNG DISPLAY CO LTD
  • US7867797B2 patent drawing
  • US7867797B2 patent drawing
  • US7867797B2 patent drawing

AI summary

In a method of fabricating organic light emitting diode display, a planarization layer is annealed, cured, provided with an ashing treatment, and surface-treated to reduce roughness of the planarization layer. Therefore, it is possible to improve reduce problems such as a decrease in reflectivity and variation of color coordinates of the organic light emitting diode display due to the roughness of the planarization layer.