OLED Power Line Uniform Width Design for Voltage Drop Reduction
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Solution Overview
Problem
OLED displays experience luminance deviation and degradation due to voltage drops along non-uniform power lines, particularly in active matrix displays where the power line narrows, affecting the uniformity and longevity of the display.
Innovation Solution
The implementation of a power line (ELVDD) with a uniform width and a cathode power line (ELVSS) structured into identical sections, electrically insulated and interconnected by a conductive layer, to maintain consistent voltage distribution and reduce line resistance, ensuring uniform luminance across the display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the power line width is reduced to minimize dead space in the display, then the display area is maximized, but voltage drop increases causing luminance deviation
Solution Approach 1:
The power line structure transitions from a uniform width design to a variable width design where the width is locally adjusted. Specifically, the power line has a first width in a first region and a second width (greater than the first width) in a second region, allowing different sections to have different electrical characteristics tailored to their specific functional requirements.
Solution Approach 2:
The power line width is made dynamic rather than static, varying along the length of the power line to optimize performance. The width changes from a narrower first width to a wider second width at different positions, enabling the power line to adapt its electrical properties to reduce voltage drop while minimizing overall space occupation.
2Reliability
If the power line width is increased to reduce voltage drop, then luminance uniformity is improved, but dead space in the display increases
Solution Approach 1:
Instead of uniformly increasing the power line width across its entire length, the invention applies width variation locally. The power line has a wider second width only in the second region where it is needed to reduce voltage drop, while maintaining a narrower first width in the first region to minimize dead space.
3Area of stationary object
If the cathode power line is formed adjacent to the narrow portion of the power line, then space is optimized, but voltage drop and luminance deviation worsen
Solution Approach 1:
The cathode power line is positioned in a different spatial dimension relative to the power line. Specifically, the cathode power line is formed in a third region that is adjacent to the pixel area, while the power line with its variable width is formed in a second region. This spatial separation allows both lines to be optimized independently.
4Illumination intensity
If OLED elements are exposed to higher voltages to achieve higher luminance, then brightness is improved, but degradation increases reducing lifespan
Solution Approach 1:
The variable width power line structure is designed in advance to compensate for and cushion against voltage drops before they occur. By having a wider second width in the second region, the power line's electrical resistance is reduced in advance, preventing excessive voltage drops and protecting OLED elements from being exposed to harmful higher voltages that would accelerate degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances luminance uniformity and reduces degradation of OLED elements by minimizing voltage drops, thereby improving the display's performance and lifespan.
Implementation Method 1
a power line (ELVDD) that is formed with a uniform width in the non-pixel area to supply a common power voltage to the pixels
Implementation Method 2
a cathode power line (ELVSS) that is formed in the non-pixel area at an identical layer to the power line and is coupled to the cathode electrode to supply a cathode voltage to the pixels
Implementation Method 3
a passivation layer that is formed between the cathode power line and the power line to insulate the cathode power line from the power line
Data Source
AI summary
An organic light emitting diode display comprises a substrate having a pixel area and a non-pixel area, a plurality of pixels formed in the pixel area, a power line with a uniform width formed in the non-pixel area configured to supply a common power voltage to the pixels, a cathode electrode formed on the substrate, and a cathode power line formed in the non-pixel area on the same layer as the power line and coupled to the cathode electrode to supply a cathode voltage to the pixels, wherein each pixel comprises a thin film transistor and an organic light emitting element.