OLED Power Wire Network Voltage Drop Compensation
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Solution Overview
Problem
Organic light-emitting display panels experience luminance deviations due to voltage drops in power lines, causing uneven voltage levels across pixels, which affect the desired brightness of emitted light.
Innovation Solution
The solution involves a power wire network with power transfer lines and power input lines connected to power wires outside the display area, minimizing line resistance and voltage drop, and a method to calculate and compensate for voltage drops by measuring and adjusting voltage levels at the panel center and edge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If power lines are used to supply voltage to pixels across the display panel, then power delivery is achieved, but voltage drop occurs causing luminance deviations
Solution Approach 1:
The power wire network is segmented into multiple components: power wires extending outside the display area, power transfer lines within the display area, and power input lines connecting to pixel circuits. This segmentation allows optimized placement and reduced resistance in each segment, thereby minimizing overall voltage drop while maintaining power delivery capability.
Solution Approach 2:
The patent implements voltage compensation mechanisms that adjust voltage levels to achieve equipotential conditions across different pixel locations. By measuring and compensating for voltage drops, the system ensures that all pixels receive consistent voltage levels despite their different positions in the power distribution network, thus eliminating luminance deviations.
2Manufacturing precision
If voltage compensation is implemented to correct luminance deviations, then luminance uniformity is improved, but measurement and compensation time increase
Solution Approach 1:
The patent performs voltage measurements and compensation calculations in advance during the display initialization phase. By pre-measuring voltage drops at the panel center and edges, and pre-calculating compensation values, the system prepares correction data before actual display operation begins, thus minimizing the time required during active display operation.
Solution Approach 2:
The system implements a feedback mechanism where voltage levels are measured at specific locations (panel center and edges), compensation values are calculated based on these measurements, and the compensation is applied to subsequent voltage supply. This closed-loop feedback ensures accurate luminance uniformity while optimizing the compensation process through iterative refinement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces luminance deviations by maintaining consistent voltage levels across pixels, enhancing image quality and reducing power consumption while minimizing compensation time and error probabilities.
Implementation Method 1
Each pixel includes an organic light-emitting diode that emits light based on a recombination of electrons and holes in an emitting layer
Implementation Method 2
The voltage drop may be caused by relatively higher-level current flowing in each of the power lines and resistance components of the power lines
Data Source
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AI summary
An organic light-emitting display panel (110) includes a power input line (PIL), a power transfer line (PTL), and first (PW1) and second (PW2) power wires. The power input line (PIL) extends in a first direction of a display area (DA) and applies a first source voltage (ELVDD). The power transfer line (PTL) extends in the first direction, is connected to a center point of the power input line (PIL) via a connection part (CN), and transfers the first source voltage (ELVDD) to the power input line (PIL). The first power wire (PW1) and second power wire (PW2) extends in a second direction outside the display area (DA) and supply the first source voltage (ELVDD) to the power input line (PIL) and the power transfer line (PTL). A plurality of pixels (PX) are arranged in a matrix in the display area (DA) and are connected to the power input line (PIL) to receive the first source voltage (ELVDD) through the power input line.