Semiconductor Protrusion Lines Prevent OLED Short Circuits
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Solution Overview
Problem
The formation of semiconductor layers through crystallization can lead to short circuits between upper and lower electrodes in organic light-emitting display devices, resulting in dark spot defects due to the potential overlap of protrusion lines with the transparent electrode.
Innovation Solution
The organic light-emitting display device incorporates a semiconductor layer with protrusion lines that extend in a specific direction, parallel to the peripheral edge of the conductive layer, and a wiring system that includes an extension portion electrically connected to the semiconductor layer, ensuring that the protrusion lines do not overlap with the conductive layer or wiring, thereby preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the semiconductor layer is formed using a crystallization process, then the semiconductor layer can be manufactured, but short circuits may occur between upper and lower electrodes of a capacitor, causing dark spot defects
Solution Approach 1:
The patent applies local quality by creating protrusion lines with specific geometric characteristics (height, width, spacing) in the semiconductor layer. These localized structural variations ensure that protrusion lines outside the conductive layer maintain adequate spacing, preventing short circuits while allowing manufacturing via standard crystallization processes.
Solution Approach 2:
The patent implements preliminary action by pre-configuring the semiconductor layer with protrusion lines before forming the conductive layer. This advance structuring ensures that when the conductive layer is deposited, the protrusion lines are already positioned to prevent overlap and short circuits, eliminating the need for post-manufacturing adjustments.
2Ease of manufacture
If protrusion lines are formed in the semiconductor layer, then manufacturing is enabled, but overlap with the transparent electrode may cause short circuits
Solution Approach 1:
The patent uses local quality by defining specific geometric parameters for protrusion lines (height H1, width W1, spacing D1) that are optimized for their function. The protrusion lines outside the conductive layer are configured with dimensions that naturally prevent overlap, achieving precise positioning through localized structural design rather than global control.
Solution Approach 2:
The patent applies dimensionality change by utilizing the vertical dimension (height of protrusion lines) to create spatial separation. By making protrusion lines extend vertically with height H1, the patent adds a dimensional buffer that prevents horizontal overlap between the semiconductor layer features and the conductive layer, transforming a 2D positioning problem into a 3D spatial solution.
3Reliability
If the protrusion lines extend parallel to the peripheral edge of the conductive layer, then short circuits are prevented, but the device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the semiconductor layer into distinct regions: areas with protrusion lines and areas without. This segmentation allows the protrusion lines to be concentrated in specific locations (outside the conductive layer) where they are needed for short circuit prevention, while other areas maintain simpler structures, thereby reducing overall device complexity.
Solution Approach 2:
The patent uses inversion by reversing the conventional approach: instead of making the entire semiconductor layer complex to prevent short circuits, the patent creates a simpler base structure and adds protrusion lines only where necessary (outside the conductive layer). This inverted strategy reduces overall complexity while maintaining reliability.
Data Source
AI summary
An organic light-emitting display device. The organic light-emitting display device includes a substrate, a semiconductor layer arranged on the substrate, an insulating film arranged on the semiconductor layer and a conductive layer arranged on the insulating film, wherein the semiconductor layer comprises a plurality of protrusion lines extending in a first direction, the protrusion lines being parallel to a peripheral edge of the conductive layer.