OLED Shift Register Unit Reducing Transistor Count for Narrow Bezel
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Solution Overview
Problem
Current light-emitting control shift registers for OLED displays are complex and require multiple transistors, making it difficult to achieve a narrow-bezel display device due to the special sequence requirements.
Innovation Solution
A shift register unit with a reduced number of transistors is designed, comprising two modules with specific input and output control mechanisms, utilizing p-type transistors and capacitors to manage clock signals and levels, allowing for efficient signal transmission and maintaining potential states, thereby simplifying the structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional light-emitting control shift register is used to meet the special sequence requirements of OLED display, then the display can be controlled to remain in light-emitting state, but the structure becomes complex and requires a plurality of transistors
Solution Approach 1:
The shift register unit is divided into two independent modules: a first shift register module and a second shift register module. Each module handles specific control functions, allowing the complex light-emitting control sequence to be segmented into manageable parts while reducing the total transistor count compared to a conventional single-module design.
Solution Approach 2:
The first shift register module is designed to perform multiple functions: it controls the light-emitting stage, manages clock signal transmission, and maintains potential states across different operation phases. This multi-functionality reduces the need for separate dedicated circuits, thereby simplifying the overall structure.
2Reliability
If a conventional light-emitting control shift register with multiple transistors is used, then the light-emitting sequence control is achieved, but it is very hard to provide a narrow-bezel display device
Solution Approach 1:
By segmenting the shift register into two modules with specialized functions, the design achieves the required light-emitting sequence control with fewer total transistors. This reduction in transistor count directly translates to reduced pixel circuit area, enabling narrower bezels in display devices.
Solution Approach 2:
The invention changes the operational parameters by using phase-reversed clock signals (first clock signal and second clock signal with opposite phases) to control the two modules. This parameter change allows for more efficient timing control with reduced hardware overhead, contributing to area savings for narrow-bezel implementation.
3Length of moving object
If the number of transistors is reduced in the shift register unit, then the area is reduced for narrow-bezel display, but the signal transmission control within the display region may be affected
Solution Approach 1:
The patent introduces a third control node that acts as an intermediary between the first and second modules. This intermediary node ensures proper signal transmission control by coordinating the interaction between the two modules, maintaining reliability even with the reduced transistor count.
Solution Approach 2:
The design incorporates feedback mechanisms where the output of one module influences the operation of the other module through shared control nodes and clock signals. This feedback ensures that signal transmission is properly controlled and synchronized, maintaining system reliability despite the simplified structure.
Data Source
AI summary
A shift register unit includes a first shift register module and a second shift register module. The first shift register module includes a first input module configured to input a start signal to a first control node, a second input module configured to input a first level to a second control node, a first output control module configured to input a second level to the first control node, a second output control module configured to input a first clock signal to the second control node, a first output module configured to input the first clock signal to a first output end, and a second output module configured to input the first level to the first output end. The second shift register module includes a second output end, third and fourth input modules, third and fourth output control modules, and third and fourth output modules.