OLED Signal Control Apparatus for High Refresh Rate Fluency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
OLED display apparatuses face poor display fluency at low data signal frequencies and insufficient light emission at high frequencies due to inadequate data signal writing time, affecting brightness and overall display effect.
Innovation Solution
A signal control apparatus with a phase shifting circuit, write control circuit, and matching control circuit that divides pixel driving circuits into groups, adjusts scanning signal phases, and utilizes mutual capacitance for extended data signal writing, allowing high-frequency data signals to be written efficiently across multiple pixel driving circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the data signal frequency is increased to improve display fluency, then the refresh rate improves, but the data signal writing time becomes insufficient causing inadequate light emission
Solution Approach 1:
The pixel driving circuits are divided into multiple groups (first group, second group, etc.), with each group connected to different data lines. This segmentation allows independent control of data writing timing for each group, enabling the data signal writing phase to be extended by utilizing mutual capacitance charging during the light emission phase of previous groups, thus resolving the contradiction between high refresh rate and sufficient writing time.
Solution Approach 2:
The mutual capacitance of the data lines is utilized in advance to charge the pixel driving circuits during the light emission phase. This preliminary charging action ensures that when the data signal is written during the data signal writing phase, the pixel driving circuits already have sufficient charge, eliminating the need for longer writing time even at high frequencies.
2Speed
If the data signal frequency is increased to improve display fluency, then the refresh rate improves, but the light emission brightness becomes insufficient
Solution Approach 1:
The mutual capacitance of the data lines charges the pixel driving circuits in advance during the light emission phase of previous groups. This preliminary action ensures that sufficient charge is stored before the data signal writing phase, maintaining light emission brightness even when the refresh rate is increased.
Solution Approach 2:
The system maintains continuous useful action by utilizing the light emission phase of one group to perform the charging function for subsequent groups. This overlapping timing ensures that no time is wasted and the light emission brightness is maintained across all groups even at high refresh rates.
3Illumination intensity
If the data signal writing time is extended to ensure adequate light emission, then the brightness is maintained, but the display fluency deteriorates
Solution Approach 1:
By segmenting pixel driving circuits into multiple groups with independent data lines, the patent enables parallel processing where different groups are at different phases of their cycle (light emission, data writing, etc.). This allows the system to maintain adequate writing time for each group while collectively achieving high display fluency through the overlapping cycles.
Solution Approach 2:
The patent implements periodic action by cycling through different groups of pixel driving circuits in a structured sequence. Each group undergoes light emission, data writing, and mutual capacitance charging in periodic cycles, allowing the system to maintain adequate writing time for brightness while achieving high overall display fluency through the periodic rotation of groups.
Data Source
AI summary
The present disclosure discloses a signal control apparatus and method, a display control apparatus and method, and a display apparatus. The display apparatus comprises M rows*N columns of pixel driving circuits arranged in an array, wherein the M pixel driving circuits of each column of pixel driving circuits are divided into k groups. The signal control apparatus comprises: a phase shifting circuit configured to provide a scanning signal to a pixel driving circuit to cause the pixel driving circuit to enter a data signal writing phase, wherein a phase difference between scanning signals of adjacent two pixel driving circuits in the same group of pixel driving circuits in the same column of pixel driving circuits is T, and a phase difference between scanning signals of adjacent two pixel driving circuits in the same column of pixel driving circuits is T/k; a write control circuit configured to provide a data signal from a data signal terminal to a pixel driving circuit for a data writing period of Ti=T/k; and a matching control circuit configured to control the write control circuit to provide the data signal to a pixel driving circuit that receives a scanning signal.