OLED Signal Control via Pixel Grouping and Phase Shifting

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Solution Overview

Problem

OLED display apparatuses face poor fluency and insufficient light emitting brightness due to the limitations in data signal frequency, where higher frequencies reduce data signal writing time, leading to incomplete data signal writing and reduced brightness.

Innovation Solution

A signal control apparatus that groups pixel driving circuits into multiple groups, using a phase shifting circuit and write control circuit to provide scanning and data signals, allowing for extended data signal writing periods through mutual capacitance charging, ensuring consistent brightness at higher frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the data signal frequency is increased to improve refresh rate and fluency, then the refresh rate improves, but the data signal writing time becomes insufficient leading to reduced light emitting brightness

Engineering Contradiction:
Improverefresh rateVSAvoidlight emitting brightness
Core Design Contradiction:
SpeedVSIllumination intensity

Solution Approach 1:

The pixel driving circuits are divided into multiple groups (first group and second group), with each group connected to separate data lines. This segmentation allows independent control of data signal writing for different pixel groups, enabling the writing period to be extended beyond the traditional frame period while maintaining high refresh rates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The data signal is provided to the pixel driving circuits before the frame period ends, utilizing the mutual capacitance of the data lines to maintain the data signal during the extended writing period. This preliminary action ensures that data writing is completed and stabilized before the next frame begins, preserving brightness even at higher frequencies.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the data signal frequency is increased to improve fluency, then the fluency improves, but the data signal writing becomes incomplete leading to reduced brightness

Engineering Contradiction:
ImprovefluencyVSAvoiddata signal writing completeness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The data signal writing action continues beyond the traditional frame period by utilizing the mutual capacitance of the data lines. The data signal is maintained continuously through the extended writing period, ensuring complete data signal writing even at higher frequencies that improve fluency.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The mutual capacitance of the data lines acts as an intermediary element that stores and maintains the data signal during the extended writing period. This intermediary mechanism allows the data signal to persist and complete writing even when the frame period is shortened for higher fluency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11749210B2Signal control apparatus and method, display control apparatus and method, and display apparatus
Publication Date: 2023.09.05 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US11749210B2 patent drawing
  • US11749210B2 patent drawing
  • US11749210B2 patent drawing

AI summary

A signal control apparatus and method, a display control apparatus and method, and a display apparatus are provided. The display apparatus includes M rows by N columns of pixel driving circuits arranged in an array, the M pixel driving circuits of each column are grouped into at least a first group of pixel driving circuits and a second group of pixel driving circuits, M and N are integer and N is larger than 2. The first group of pixel driving circuits connect to a first data line to receive a data signal, and the second group of pixel driving circuits connect to a second data line to receive a data signal. The signal control apparatus includes a phase shifting circuit which provides a scanning signal to a pixel driving circuit; and a write control circuit which provides a data signal from a data signal terminal to a pixel driving circuit.