OLED Array Substrate Signal Loop Layout for Uniform Current Delivery

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Solution Overview

Problem

Existing OLED display technologies face challenges in efficiently managing the driving current to maintain consistent illumination, particularly in the arrangement and connectivity of signal lines and voltage supply lines, which can affect display performance.

Innovation Solution

The array substrate incorporates a unique design with signal lines in multiple layers, forming loops around pixel driving circuits and using voltage connecting bridges in different layers to optimize the connection and distribution of signals and voltages, enhancing the efficiency and consistency of current delivery to OLED devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If signal lines are arranged in a single layer, then the structure is simple, but the current distribution uniformity deteriorates

Engineering Contradiction:
Improvesignal line structureVSAvoidcurrent distribution uniformity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent transitions from a single-layer signal line arrangement to a multi-layer configuration, adding the vertical dimension to the horizontal layout. This allows signal lines to be distributed across multiple layers, improving current distribution uniformity while managing the increased structural complexity through systematic layer design.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The signal line system is segmented into multiple layers, with each layer containing specific signal line portions. This segmentation allows for optimized current distribution in each layer while collectively achieving uniform overall current delivery to the OLED devices.

Inventive Principle:
Principle #1Segmentation

2Productivity

If voltage supply lines are extended to cover larger areas, then more OLED devices are supplied, but the voltage supply stability deteriorates

Engineering Contradiction:
Improvenumber of supplied OLED devicesVSAvoidvoltage supply stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The voltage supply system is divided into multiple voltage supply lines, each serving specific regions. This segmentation allows the voltage supply network to cover larger areas while maintaining stability by distributing the load across multiple dedicated lines rather than relying on single extended lines.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Voltage supply lines are arranged in multiple layers, utilizing the vertical dimension to expand coverage area without compromising voltage stability. This multi-layer approach allows more OLED devices to be supplied while maintaining short current paths and stable voltage delivery.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If signal lines are arranged to improve current uniformity, then OLED display uniformity improves, but the manufacturing complexity increases

Engineering Contradiction:
ImproveOLED display uniformityVSAvoidsignal line fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs multi-layer signal line arrangements to achieve uniform current distribution and consistent OLED display performance. While this increases manufacturing complexity compared to single-layer designs, the systematic layer structure provides a manageable fabrication process that delivers superior display uniformity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260047202A1Array substrate and display apparatus
Publication Date: 2026.02.12 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US20260047202A1 patent drawing
  • US20260047202A1 patent drawing
  • US20260047202A1 patent drawing

AI summary

An array substrate includes a plurality of signal lines. A respective signal line includes a plurality of first signal line portions, a plurality of second signal line portions, and a plurality of third signal line portions. The plurality of first signal line portions and the plurality of second signal line portions are in two different layers. The plurality of first signal line portions and the plurality of third signal line portions are in two different layers. Two individual first signal line portions, an individual second signal line portion, and an individual third signal line portion form a loop substantially surrounding a region having transistors and capacitors of a pixel driving circuit of a subpixel. The two individual first signal line portions are connected by the individual second signal line portion, and connected by the individual third signal line portion.