OLED Stage Transistor Hole Layout Against Electrode Misalignment
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Solution Overview
Problem
In OLED display devices, misalignment of source and drain electrodes within the gate insulating layer holes can lead to electrical disconnection, causing malfunction of stage transistors in non-display areas.
Innovation Solution
The gate insulating layer holes of stage transistors in non-display areas are formed in a zigzag shape to prevent electrical disconnection by ensuring proper alignment and contact of source and drain electrodes, improving contact resistance uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate insulating layer holes are formed in a straight line, then manufacturing process is simple, but source and drain electrodes may be electrically disconnected due to misalignment
Solution Approach 1:
The gate insulating layer holes are arranged in a zigzag pattern rather than a straight line, creating an asymmetric configuration that prevents both sides of the source and drain electrodes from being simultaneously disposed in the holes during misalignment, thereby maintaining electrical connection reliability
Solution Approach 2:
The zigzag pattern is designed in advance to counteract the potential harmful effect of misalignment before it causes electrical disconnection, by ensuring that even if misalignment occurs, at least one side of the electrodes remains outside the holes and maintains proper contact
2Productivity
If source and drain electrodes are etched with misalignment, then etching process is completed, but electrical disconnection occurs causing transistor malfunction
Solution Approach 1:
The zigzag pattern of gate insulating layer holes serves as a preventive measure that cushions against the potential failure mode of electrical disconnection during etching, ensuring that even with misalignment, the electrodes maintain proper electrical connection and transistor functionality
3Manufacturing precision
If gate insulating layer holes are formed to accommodate source and drain electrodes, then electrode contact is enabled, but misalignment causes both sides to be disposed in holes leading to disconnection
Solution Approach 1:
The asymmetric zigzag arrangement of gate insulating layer holes creates a geometric configuration where simultaneous disposal of both electrode sides within the holes becomes impossible, even under misalignment conditions, thereby maintaining electrical connection stability
Data Source
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AI summary
A display device includes: a substrate having a display area including a subpixel and a non-display area surrounding the display area; a driving transistor and a light emitting diode in the subpixel on the substrate; and a second stage transistor in the non-display area on the substrate, wherein the second stage transistor includes a second active layer, a second gate electrode, a second source electrode and a second drain electrode, and wherein a gate insulating layer between the second active layer and the second source electrode and between the second active layer and the second drain electrode exposes the second active layer and has a plurality of second gate insulating layer holes in a zigzag line along a horizontal direction parallel to the second source electrode and the second drain electrode.