OLED Storage Capacitor Hole-Through Gate Insulator
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Solution Overview
Problem
The capacitance of the storage capacitor in organic light emitting diode (OLED) display devices is reduced due to the decreasing size of pixel regions, making it difficult to achieve sufficient capacitance for high definition displays while maintaining effective emission area and design margins.
Innovation Solution
The implementation of a storage capacitor structure with a first and second capacitor electrode connected in parallel, where the gate insulating layer has holes exposing the second semiconductor layer to increase capacitance, allowing for a thinner second semiconductor layer and a buffer layer to enhance capacitance without increasing the area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel region size is reduced for high definition displays, then the definition is improved, but the capacitance of the storage capacitor is reduced
Solution Approach 1:
The patent introduces holes through the gate insulating layer to create a vertical dimension for capacitance enhancement. The second capacitor electrode is positioned in these holes, extending downward to increase the overlapping area with the first capacitor electrode, thereby increasing capacitance without expanding the planar pixel region area.
Solution Approach 2:
The gate insulating layer is made porous by forming holes through it. These holes provide space for the second capacitor electrode to extend downward, increasing the effective capacitance area. The porous structure allows the capacitor to achieve higher capacitance within the same footprint area.
2Reliability
If the area of the storage capacitor is increased to maintain capacitance, then the capacitance is improved, but the effective emission area is reduced
Solution Approach 1:
The patent utilizes the vertical dimension by forming holes through the gate insulating layer and positioning the second capacitor electrode within these holes. This vertical arrangement increases the overlapping area between capacitor electrodes without expanding the planar area, thereby maintaining effective emission area while increasing capacitance.
Solution Approach 2:
The second capacitor electrode is nested within the holes of the gate insulating layer, which themselves are nested within the pixel region structure. This nested arrangement allows the capacitor to achieve increased capacitance by utilizing the vertical space within the existing pixel region boundaries.
3Reliability
If a thicker second semiconductor layer is used, then the capacitance is improved, but the manufacturing complexity and area are increased
Solution Approach 1:
The patent extracts the gate insulating layer material to form holes, creating space for the second capacitor electrode. This extraction approach increases capacitance by enhancing the overlapping area between electrodes without requiring a thicker semiconductor layer, thereby avoiding increased manufacturing complexity associated with thick layer deposition.
Data Source
AI summary
An organic light emitting diode display device comprises a driving thin film transistor including a first semiconductor layer, a gate insulating layer formed on the first semiconductor layer. The device further includes a storage capacitor including a first capacitor electrode electrically coupled to a drain electrode of the driving thin film transistor, a buffer layer formed on the first capacitor electrode, a second semiconductor layer formed on the buffer layer, and a second capacitor electrode formed on the second semiconductor layer and electrically coupled to a gate electrode of the driving thin film transistor. The device also includes an organic light emitting diode connected to the drain electrode of the driving transistor. The gate insulating layer has at least one hole in a region where the gate insulating layer overlaps the second semiconductor layer, thereby exposing the second semiconductor layer to the second capacitor electrode.