OLED Sub-Pixel Layout With Shielding Against Drive Gate Interference

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Solution Overview

Problem

High refresh frequency in OLED display panels causes signal jumps that affect the gates of drive transistors, leading to disturbances in the electric field and a negative impact on the display effect.

Innovation Solution

The display panel design includes a semiconductor layer with specific active layers and conductive layers arranged to increase the distance between the drive gate and the data signal line, incorporating a shielding structure and conductive connection parts to minimize signal interference, thereby reducing the impact of data signal line disturbances on the drive gate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the data signal line is positioned closer to the drive gate to reduce pixel area, then the area of the sub-pixel is reduced, but the signal interference from the data signal line to the drive gate increases

Engineering Contradiction:
Improvesub-pixel areaVSAvoidsignal interference
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

A shielding structure comprising a shielding electrode and insulation layer is introduced between the data signal line and the drive gate. The shielding electrode is electrically connected to a fixed potential signal line, creating an electromagnetic shield that blocks signal interference while allowing the data signal line to maintain its proximity to the drive gate for compact pixel design

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding function is extracted as a separate component (shielding structure) rather than being integrated into the existing transistor structure. This allows the shielding electrode to be independently positioned and connected to the fixed potential signal line, effectively isolating the drive gate from data signal line interference

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If high refresh frequency is implemented to improve display performance, then the display effect is enhanced, but signal jumps affect the drive transistor gates causing disturbances

Engineering Contradiction:
Improverefresh frequencyVSAvoidsignal stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The fixed potential signal line carrying the shielding electrode converts the potential harmful electromagnetic interference into a beneficial shielding effect. By maintaining a stable potential at the shielding electrode, it creates an electromagnetic barrier that protects the drive gate from signal jumps during high refresh frequency operation

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The shielding structure is positioned and electrically connected in advance to prevent signal interference before it can affect the drive gate. The fixed potential signal line is established beforehand to maintain a stable electromagnetic environment, countering the signal jumps that occur during high refresh frequency operation

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11751450B2Display panel and display device
Publication Date: 2023.09.05 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US11751450B2 patent drawing
  • US11751450B2 patent drawing
  • US11751450B2 patent drawing

AI summary

Disclosed are a display panel and a display device. The display panel includes: a base substrate and a plurality of sub-pixels located on the base substrate; and each sub-pixel includes: a semiconductor layer located on the base substrate and including a first active layer of an initialization transistor, a second active layer of a reset transistor and a third active layer of a data writing transistor; a first conductive layer located on a side of the semiconductor layer and including a data signal line extending in a first direction; and a second conductive layer located on the base substrate and including a drive gate of a drive transistor; and an orthographic projection of the second active layer on the base substrate is located between an orthographic projection of the first active layer on the base substrate and an orthographic projection of the data signal line on the base substrate.