OLED Array Substrate Layout for High-Resolution EMI Shielding

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Solution Overview

Problem

Existing display technologies face challenges in achieving ultra-high display resolution required for virtual reality applications, particularly in organic light emitting diode (OLED) displays, due to limitations in pixel design and electromagnetic interference.

Innovation Solution

The array substrate incorporates a design with specific pixel arrangements, including source electrode connecting lines wider than 75% of anode width, interference prevention blocks, and a low voltage signal network to shield active layers from electromagnetic interference, along with a voltage supply network to enhance pixel driving efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the source electrode connecting line width is increased to improve electrical connection reliability, then the connection reliability is improved, but the pixel area available for light emission is reduced

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidpixel area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The source electrode connecting line width is set to be greater than 75% of the anode width in specific critical regions where electrical connection reliability is most important, while maintaining standard width in other areas. This localized enhancement ensures reliable electrical connection without unnecessarily reducing overall pixel area.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If more data lines are added to increase data signal transmission capacity, then the data transmission capacity is improved, but the line density and electromagnetic interference are increased

Engineering Contradiction:
Improvedata signal transmission capacityVSAvoidelectromagnetic interference
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

Interference prevention blocks are introduced as intermediary structures between adjacent data lines. These blocks act as shields that block electromagnetic interference between neighboring data lines, allowing increased data line density without proportionally increasing interference levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The data line structure is segmented with interference prevention blocks positioned between adjacent data lines. This segmentation creates isolated electromagnetic zones, reducing cross-talk and interference while maintaining high data transmission capacity.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If the pixel density is increased to achieve ultra-high display resolution, then the display resolution is improved, but the space for pixel driving circuits is reduced

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpixel driving circuit space
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The source electrode connecting lines serve dual functions: they connect the first transistor and second transistor within pixel driving circuits, and simultaneously connect to data connecting pads for data signal input. This merging of functions reduces the number of separate connection lines needed, freeing up space for pixel driving circuits while maintaining ultra-high display resolution.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The source electrode connecting lines are designed with multi-functionality, serving both as internal pixel circuit interconnects and as external data signal pathways. This universal design optimizes space utilization in the pixel structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12488746B2Array substrate and display apparatus
Publication Date: 2025.12.02 BEIJING BOE TECH DEV CO LTD
  • US12488746B2 patent drawing
  • US12488746B2 patent drawing
  • US12488746B2 patent drawing

AI summary

An array substrate is provided. The array substrate includes pixels arranged in a plurality of repeating units. The array substrate includes a plurality of source electrode connecting lines and a plurality of data connecting pads in the repeating unit, and a plurality of data lines. A respective source electrode connecting line of the plurality of source electrode connecting lines connects first electrodes of a first transistor and a second transistor in a respective pixel driving circuit together. The respective source electrode connecting line is further connected to a respective data connecting pad of the plurality of data connecting pads. The respective data connecting pad is connected to a respective data line of the plurality of data lines. A maximum width of the respective source electrode connecting line is greater than at least 75% of a maximum width of a respective anode.