OLED Array Substrate with Differentiated Gate Insulating Layer Thickness

The patent applies local quality by differentiating the gate insulating layer thickness for switching and driving transistors. The switching transistor uses a thinner gate insulating layer (600-800 nm) to achieve lower S factor and better switching performance, while the driving transistor uses a thicker gate insulating layer (800-2000 nm) for higher S factor and stable current control. This localized parameter differentiation resolves the contradiction between manufacturing simplicity and device performance.

The patent changes the gate insulating layer thickness parameter to differentiate transistor performance. By adjusting this critical parameter, the switching transistor achieves S factor < 0.5V/decade for rapid switching, while the driving transistor achieves S factor > 0.5V/decade for stable grayscale control. This parameter change approach maintains manufacturing feasibility while optimizing individual transistor characteristics.

The patent implements local quality by assigning different gate insulating layer thicknesses to switching and driving transistors. The switching transistor's thinner gate insulating layer creates stronger electric field for rapid charge/discharge, enabling effective switching. The driving transistor's thicker gate insulating layer provides gentler electric field for stable current control. This localized structural differentiation simultaneously achieves both switching effectiveness and current stability.

The patent segments the transistor design by creating distinct structural configurations for switching and driving transistors. Rather than using uniform parameters, the design divides the transistor system into two optimized sub-systems with different gate insulating layer thicknesses, allowing each to perform its specific function optimally without compromising the other.