OLED Displaying Substrate Via-Hole Layout to Prevent Over-Etching

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Solution Overview

Problem

Existing OLED technologies face challenges in ensuring the flatness of the organic luminescent layer on the film surface, leading to issues with luminous efficiency and service life due to over-etching during the etching process, which causes metal oxidation and affects subsequent metal film layer overlapping and signal transmission.

Innovation Solution

A displaying substrate with a passivation layer and a flat layer, featuring specific via holes and sleeve holes in both active and non-active areas, is designed to minimize the difference in via hole etching depths, preventing over-etching and protecting the metal structure from oxidation, while allowing for high-quality metal film layer overlapping and stable signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the etching process is performed to create via holes in the flat layer and passivation layer, then the electrical connection between metal layers is achieved, but over-etching occurs causing metal oxidation and affecting subsequent metal film layer overlapping and signal transmission

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidmetal oxidation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by forming a protective layer on the metal layer before the etching process. This protective layer is etched along with the flat layer and passivation layer to form via holes, but it initially protects the metal layer from oxidation during etching. The protective layer is then selectively removed only in the via hole regions, allowing electrical connection while preventing harmful oxidation on the metal surface that would affect subsequent processing and signal transmission.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer serves as an intermediary between the etching process and the metal layer. It mediates the conflict by being present during etching to prevent direct contact between the etching chemistry and metal surface, thus preventing oxidation. The intermediary is then selectively removed where needed (in via holes) to establish electrical connection, while leaving the metal surface protected in other areas for subsequent metal film layer overlapping.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the via holes are etched deeply to ensure electrical connection through multiple layers, then the connection reliability is improved, but the etching depth difference between various via holes increases causing over-etching in some regions

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidvia hole etching depth uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The protective layer is formed preliminarily across the entire metal layer surface before etching. During the etching process to create via holes through the flat layer and passivation layer, the protective layer remains in place to protect the metal surface. This preliminary protective action allows the etching to proceed to the required depth for electrical connection without causing over-etching variations, as the protective layer uniformly prevents excessive etching across all regions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer provides beforehand cushioning against over-etching. By being present before the etching process, it cushions or limits the etching depth to prevent penetration into the metal layer. This prior cushioning effect ensures uniform etching depth control across all via holes, preventing the depth variations and over-etching that would otherwise occur in regions where via holes need to be etched deeper.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Adaptability or versatility

If the flat layer and passivation layer are formed with via holes at different depths, then the electrical connection requirements for different areas are met, but the etching process becomes complex and difficult to control

Engineering Contradiction:
Improveelectrical connection adaptabilityVSAvoidetching process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The via hole formation process is segmented into two independent stages: first, forming via holes through the flat layer and passivation layer to the metal layer; second, removing the protective layer only in the via hole regions. This segmentation allows different via holes to be formed to different depths as needed for electrical connection adaptability, while the etching process itself remains simple and uniform. The complexity of handling different via hole depths is transferred to the selective protective layer removal step rather than the etching step.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The protective layer acts as an intermediary that simplifies the etching process. It allows all via holes to be etched using the same simple process parameters, while the intermediary's selective removal afterward creates the required depth variations for different electrical connection needs. This intermediary approach decouples the etching process complexity from the via hole depth variation requirements, making the overall process easier to control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12133417B2Displaying substrate, manufacturing method thereof and display panel
Publication Date: 2024.10.29 HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD
  • US12133417B2 patent drawing
  • US12133417B2 patent drawing
  • US12133417B2 patent drawing

AI summary

The disclosure relates to the technical field of display, in particular to a displaying substrate, a manufacturing method thereof and a display panel. The displaying substrate comprises a passivation layer (28) and a flat layer (29) covering the passivation layer (28), wherein the flat layer (29) comprises a first flat via hole and a plurality of second flat via holes, the passivation layer (28) comprises a first passivation via hole, and the first flat via hole and the first passivation via hole form a first sleeve hole (31); and the hole depth of the first flat via hole is smaller than that of each second flat via hole, and the hole depth of the first passivation via hole is greater than or equal to the difference between the maximum hole depth of all the second flat via holes and the hole depth of the first flat via hole.