OLED TFT Layer Stack for NMOS Doping and PMOS Dehydrogenation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing organic light-emitting display devices face challenges in efficiently doping semiconductor layers of NMOS transistors without pre-processes and improving dehydrogenation in PMOS transistors for enhanced driving range.
Innovation Solution
The method involves doping the semiconductor layer of an NMOS transistor with n-type impurity ions through heat treatment and improving dehydrogenation of PMOS transistors by forming a specific stack of insulating and conductive layers, including oxide semiconductors and silicon-based materials, without the need for etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If heat treatment is used to dope semiconductor layer with n-type impurity ions, then doping efficiency is improved and pre-processes are eliminated, but manufacturing precision may be affected
Solution Approach 1:
The patent employs heat treatment at controlled temperatures to dope the semiconductor layer with n-type impurity ions. By adjusting temperature parameters and treatment duration, the method achieves effective doping while maintaining precision, eliminating the need for separate pre-processes like etching.
Solution Approach 2:
The patent replaces mechanical/chemical etching processes with thermal diffusion methods. Instead of using etching tools and chemicals to prepare the semiconductor layer, heat treatment is used to directly diffuse impurity ions into the layer, simplifying the manufacturing process while maintaining doping precision.
2Manufacturing precision
If etching processes are used for doping, then manufacturing precision is maintained, but device complexity and process steps increase
Solution Approach 1:
The patent combines multiple process steps into a single heat treatment operation. The doping process integrates impurity introduction, diffusion, and activation in one thermal processing step, eliminating the need for separate etching, cleaning, and doping steps, thereby reducing overall process complexity.
Solution Approach 2:
The patent extracts and eliminates the etching process from the doping sequence. By removing this intermediate step entirely and using direct heat treatment for doping, the method reduces process complexity while maintaining the necessary manufacturing precision through controlled thermal diffusion.
3Reliability
If oxide semiconductor layers are used, then dehydrogenation is improved and driving range is enhanced, but hydrogen ion diffusion control becomes more challenging
Solution Approach 1:
The patent applies different treatments to different regions of the oxide semiconductor layer. By controlling heat treatment parameters locally and using selective masking techniques, the method enhances dehydrogenation in required areas while controlling hydrogen ion diffusion in other regions, managing complexity through localized processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for effective doping of NMOS transistors and improved dehydrogenation of PMOS transistors, enhancing the driving range and reducing side effects associated with etching, while maintaining low surface resistance and efficient hydrogen ion diffusion.
Implementation Method 1
doping the semiconductor layer of an NMOS transistor with n-type impurity ions through heat treatment
Implementation Method 2
efficient hydrogen ion diffusion
Data Source
AI summary
An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer. The first semiconductor layer is disposed on a layer higher than the second semiconductor layer, the first semiconductor layer comprises an oxide semiconductor, the second semiconductor layer comprises low temperature polycrystalline silicon (LTPS), and the first insulating layer covers the entire first semiconductor layer.