OLED Display TFT Layout for LTPS-Oxide Process Compatibility
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Solution Overview
Problem
The integration of low-temperature polysilicon (LTPS) and metal oxide (OXIDE) thin film transistors in display devices faces challenges in process compatibility, process stability, and high manufacturing costs due to the need for multiple mask plates, especially in forming full-screen frame-free displays with bending technology.
Innovation Solution
A manufacturing method for an organic light emitting diode (OLED) display device that includes forming first and second thin film transistors with distinct semiconductor materials, using a two-step process for the first transistor and a one-step process for the second, and implementing a double source-drain electrode structure to improve process compatibility and stability, reducing etching difficulties and ensuring electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If low-temperature polysilicon and metal oxide thin film transistors are integrated in display devices, then the user experience is greatly improved due to high mobility and fast charging combined with low leakage current, but the process compatibility and stability deteriorate due to the need for multiple mask plates and complex manufacturing processes
Solution Approach 1:
The patent merges the fabrication processes of LTPS and OXIDE thin film transistors into a unified sequence, where the OXIDE transistor is formed first followed by the LTPS transistor using the same mask plates. This combining of processes improves ease of manufacture while maintaining the electrical performance benefits of both transistor types.
Solution Approach 2:
The patent employs universal mask plates that serve multiple functions in the fabrication process, enabling the formation of both OXIDE and LTPS transistor structures with the same patterning tools. This multi-functionality reduces the number of specialized equipment and processes needed, thereby improving process compatibility and manufacturing simplicity.
2Reliability
If multiple mask plates are used to form both LTPS and OXIDE thin film transistors, then the electrical characteristics are maintained, but the manufacturing cost increases and process stability deteriorates
Solution Approach 1:
The patent combines the mask plate usage for both OXIDE and LTPS transistor fabrication into a single set of mask plates that are used sequentially. This merging reduces the total number of mask plates from multiple separate sets to one unified set, thereby reducing device complexity and manufacturing cost while preserving electrical characteristics.
Solution Approach 2:
The mask plates are designed with universal functionality to pattern both OXIDE and LTPS transistor structures. This multi-functionality allows the same mask plates to serve multiple purposes in the fabrication sequence, reducing the number of specialized mask plates needed and simplifying the overall manufacturing process.
3Ease of manufacture
If LTPS and OXIDE thin film transistors are formed in the same process sequence, then process stability is improved, but etching difficulties increase due to different material properties
Solution Approach 1:
The patent segments the etching process into distinct stages, with selective etching steps tailored for each transistor type. By dividing the etching sequence into targeted segments rather than a single uniform process, the patent achieves process stability while addressing the different etching requirements of LTPS and OXIDE materials.
Solution Approach 2:
The patent applies local quality by using different etching conditions and parameters for different regions of the substrate. Specifically, the etching process is optimized locally for OXIDE transistor regions and separately optimized for LTPS transistor regions, allowing each material type to be etched with appropriate parameters while maintaining overall process stability.
Data Source
AI summary
An organic light emitting diode display device are provided. The organic light emitting diode display device includes: a substrate; a barrier layer, located on a side of the substrate; a first buffer layer, located on a side of the barrier layer; a first semiconductor layer, located on a side of the first buffer layer; a first gate insulating layer, located on a side of the first semiconductor layer; a first gate electrode, located on a side of the first gate insulating layer; a second buffer layer, located on a side of the first gate electrode; a second semiconductor layer, located on a side of the second buffer layer; a second gate insulating layer, located on a side of the second semiconductor layer; a second gate electrode, located on a side of the second gate insulating layer.