OLED TFT Substrate Same-Layer Voltage Line Reduces Crosstalk
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Solution Overview
Problem
Current OLED display technologies face challenges in reducing parasitic capacitance and signal interference, leading to crosstalk issues that result in dark spots or patches in display devices, which affect the overall performance and quality of the display.
Innovation Solution
A thin film transistor array substrate is designed with a storage capacitor and driving voltage line formed on the same layer as the second electrode, using an organic interlayer insulating film to reduce parasitic capacitance and signal interference, and a bridge connecting the second electrode and driving voltage line to enhance electrical connectivity without additional mask processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the driving voltage line is formed on a separate layer from the second electrode, then electrical connectivity is achieved, but parasitic capacitance and signal interference increase causing crosstalk
Solution Approach 1:
The patent merges the driving voltage line and the second electrode onto the same layer, eliminating the need for separate layer structures. This integration reduces the distance between conductive elements, thereby minimizing parasitic capacitance and preventing crosstalk while maintaining electrical connectivity through direct contact or bridge structures.
Solution Approach 2:
The patent extracts the driving voltage line from the traditional multi-layer structure and places it directly on the same layer as the second electrode. This extraction simplifies the overall device structure by removing unnecessary intermediate layers and insulation structures, reducing complexity while improving signal integrity.
2Ease of manufacture
If additional mask processes are used to form separate layers, then electrical connectivity is ensured, but manufacturing complexity and cost increase
Solution Approach 1:
By combining the formation of the driving voltage line and second electrode into a single layer process, the patent eliminates the need for additional mask processes that would be required for separate layer formation. This merging approach maintains electrical connectivity through direct contact or bridge structures while significantly simplifying the manufacturing process.
Solution Approach 2:
The single layer structure serves multiple functions: it provides both the second electrode for capacitance storage and the driving voltage line for electrical connection. This multi-functionality eliminates the need for separate dedicated layers and mask processes, reducing manufacturing complexity while ensuring reliable electrical connectivity.
3Object-affected harmful factors
If the interlayer insulating film is made thicker, then insulation effect is improved, but parasitic capacitance increases due to larger area requirements
Solution Approach 1:
The patent merges the driving voltage line and second electrode onto the same layer, eliminating the need for thick interlayer insulating films. This integration reduces the required insulation distance while maintaining signal isolation, thereby reducing parasitic capacitance and preventing crosstalk without increasing device area.
Solution Approach 2:
The patent uses bridge structures or direct contact configurations as intermediaries to achieve electrical connectivity without requiring thick insulating films. These intermediary structures enable the driving voltage line to connect to the second electrode while maintaining adequate insulation through the organic interlayer film, reducing parasitic capacitance while preventing signal interference.
Data Source
AI summary
A thin film transistor (TFT) array substrate and organic light-emitting diode (OLED) display including the same are disclosed. In one aspect, the array substrate includes a substrate, a driving TFT formed over the substrate and including a driving gate electrode, and a storage capacitor including a first electrode electrically connected to the driving gate electrode and a second electrode formed over and insulated from the first electrode. The array substrate also includes an interlayer insulating film at least partially covering the first electrode and a driving voltage line formed over the interlayer insulating film and configured to supply a voltage to the driving TFT. The driving voltage line is formed on the same layer as the second electrode.