OLED Display Timing Controller Non-Overlap Signal Generation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing OLED display technologies face challenges in accurately extracting threshold voltages of drive thin film transistors due to overlap periods and interference from parasitic capacitance, leading to non-uniform luminance and limited display quality improvement.

Innovation Solution

An OLED display system that includes a timing controller generating non-overlap signals to prevent overlap between holding clocks, a sample and hold block with an overlap prevention unit and discharging unit to accurately extract and discharge threshold voltages, ensuring precise sampling and holding of drive thin film transistor voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If holding clocks are generated adjacently to continuously sample threshold voltages, then sampling efficiency is improved, but overlap periods cause interference and reduce measurement precision

Engineering Contradiction:
Improvesampling efficiencyVSAvoidthreshold voltage extraction accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary anti-action by generating a non-overlap signal in advance that actively prevents the overlap period between adjacently generated holding clocks. This non-overlap signal is used to control the sampling operation, ensuring that threshold voltages are sampled only during non-overlap periods, thereby preventing interference before it occurs and maintaining both sampling efficiency and measurement precision.

Inventive Principle:
Principle #9Preliminary anti-action

2Device complexity

If parasitic capacitance is present in the output node, then circuit simplicity is maintained, but charge discharge interference increases and reduces measurement precision

Engineering Contradiction:
Improvecircuit structureVSAvoidthreshold voltage extraction accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by using the non-overlap signal to discharge the output node in advance during the overlap period before threshold voltage sampling occurs. This preliminary discharge removes residual charges from parasitic capacitance that would otherwise interfere with the measurement, ensuring accurate threshold voltage extraction while maintaining the simplicity of the existing circuit structure without adding complex discharge mechanisms.

Inventive Principle:
Principle #10Preliminary action

3Speed

If threshold voltages are sampled during overlap periods, then sampling speed is improved, but charge discharge interference from parasitic capacitance reduces measurement precision

Engineering Contradiction:
Improvesampling speedVSAvoidthreshold voltage extraction accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent applies feedback by using the non-overlap signal, which is generated based on the timing relationship between adjacently generated holding clocks, to control both the sampling operation and the discharge operation. The non-overlap signal provides feedback about the overlap period timing, enabling the system to automatically adjust by discharging the output node during overlap periods and sampling only during non-overlap periods, thereby maintaining sampling speed while eliminating interference.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8446345B2Organic light emitting diode display
Publication Date: 2013.05.21 LG DISPLAY CO LTD
  • US8446345B2 patent drawing
  • US8446345B2 patent drawing
  • US8446345B2 patent drawing

AI summary

An organic light emitting diode (OLED) display is disclosed. The OLED display includes a display panel including a plurality of pairs of data lines, a plurality of gate line groups crossing the pairs of data lines, and a plurality of pixels each having a drive thin film transistor (TFT) and an organic light emitting diode at each of crossings of the pairs of data lines and the gate line groups, a timing controller generating a non-overlap signal, and a sample and hold block that removes an overlap period between adjacently generated first holding clocks using the non-overlap signal to generate second holding clocks that do not overlap each other, applies sampled threshold voltages of the drive TFTs of the pixels to an output node in response to the second holding clocks, and discharges the output node in the overlap period in response to the non-overlap signal.