Organic Light-Emitting Display Device Vertical Storage Capacitor
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Solution Overview
Problem
The existing organic light-emitting display devices face challenges in achieving high resolution due to limited process margins and reduced production yield, primarily because the storage capacitor and transistor areas are not optimally overlapped, leading to spacing issues with signal lines that affect parasitic capacitance and manufacturing efficiency.
Innovation Solution
The solution involves a storage capacitor design where at least one buffer layer is interposed between the storage capacitor and the transistor, with the lower and upper storage electrodes overlapping, and having the same line width and shape as the storage buffer layer, allowing for improved overlap and alignment of capacitor and transistor areas, thus enhancing the process margin and resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the storage capacitor and transistor are arranged to be spaced apart in the horizontal direction through the same mask process, then the manufacturing process is simplified, but the process margin becomes small and high resolution cannot be realized
Solution Approach 1:
The patent transitions from horizontal arrangement to vertical stacking arrangement, where the storage capacitor is positioned above the transistor in the vertical direction. This dimensional change allows both components to be formed through the same mask process while achieving sufficient process margin, as the vertical stacking eliminates the need for horizontal spacing between capacitor and transistor areas.
Solution Approach 2:
The patent merges the formation processes of the storage capacitor and transistor by using the same mask process for both components. The capacitor electrode pattern is formed simultaneously with the transistor structure through integrated masking, simplifying manufacturing while maintaining precision through vertical arrangement.
2Object-affected harmful factors
If the signal lines are arranged to be spaced apart in the horizontal direction to reduce parasitic capacitance, then parasitic capacitance effect is reduced, but the process margin becomes small and high resolution is difficult to realize
Solution Approach 1:
The patent moves signal lines from horizontal spacing to vertical stacking arrangement above the transistor, with buffer layers interposed between them. This vertical arrangement reduces parasitic capacitance between signal lines and transistor while maintaining sufficient process margin, as the buffer layers provide electrical isolation in the vertical dimension.
Solution Approach 2:
Buffer layers are introduced as intermediary structures between the signal lines and the transistor. These buffer layers reduce parasitic capacitance by providing electrical isolation, allowing signal lines to be positioned closer to the transistor area while maintaining low parasitic coupling.
3Reliability
If the capacitor area is spaced apart from the transistor area in the horizontal direction, then the transistor operation is independent, but the process margin is reduced and production yield decreases
Solution Approach 1:
The patent positions the storage capacitor vertically above the transistor rather than spacing it horizontally. This vertical stacking maintains transistor independent operation through buffer layer isolation while maximizing the use of pixel area, thereby improving production yield through higher resolution capability.
4Area of stationary object
If the emission area overlaps the transistor area in the vertical direction, then the pixel area is maximized, but the process margin is small and high resolution cannot be realized
Solution Approach 1:
The patent resolves the conflict between emission area overlap and process margin by vertically stacking the storage capacitor above the transistor. This allows the emission area to overlap the transistor area in the horizontal plane for maximum pixel area, while the vertical capacitor positioning with buffer layers ensures sufficient process margin for high resolution manufacturing.
Data Source
AI summary
Disclosed is an organic light-emitting display device capable of realizing a high resolution. The organic light-emitting display device includes a storage capacitor disposed on a substrate, which overlaps at least one transistor, with at least one buffer layer interposed therebetween, the at least one buffer layer disposed on the storage capacitor, and which includes a lower storage electrode and an upper storage electrode overlapping the lower storage electrode, with a storage buffer layer interposed therebetween, and a light-emitting diode connected to the transistor. One of the lower storage electrode and the upper storage electrode is formed to have the same line width and the same shape as the storage buffer layer, thereby ensuring a sufficient process margin and consequently realizing a high resolution and improving production yield.