OLED Display Substrate Via-Coupled Reference Voltage Layout
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Solution Overview
Problem
In organic light emitting diode (OLED) display substrates, the placement of reference voltage auxiliary lines between pixel electrodes affects the aperture ratio, as they are electrically coupled to reference voltage lines through via holes, leading to uneven voltage stability and resistance issues.
Innovation Solution
A display substrate design with a network-like coupling of reference voltage lines and auxiliary lines, where the first reference voltage auxiliary line is electrically coupled to the first reference voltage line through via holes, reducing overall resistance and allowing for a more efficient voltage supply, while maintaining a high aperture ratio by minimizing the need for lines between pixel electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference voltage auxiliary lines are disposed in gaps between pixel electrodes and electrically coupled to reference voltage lines through via holes, then resistance of reference voltage lines is reduced, but aperture ratio of display is affected
Solution Approach 1:
The patent transitions from a planar arrangement to a three-dimensional stacked architecture by disposing reference voltage auxiliary lines in different layers (second, third, and fourth wiring layers) and connecting them through via holes. This vertical stacking allows the auxiliary lines to be positioned without occupying horizontal space between pixel electrodes, thereby reducing resistance while preserving aperture ratio.
Solution Approach 2:
The patent implements a nested structure where reference voltage auxiliary lines are embedded within multiple wiring layers, with each layer containing segments of the auxiliary lines connected by via holes. This nested arrangement allows the auxiliary lines to be integrated within the existing multi-layer wiring structure without requiring additional horizontal space, thus maintaining high aperture ratio while providing low-resistance voltage supply paths.
2Reliability
If reference voltage auxiliary lines are disposed in gaps between pixel electrodes, then resistance is reduced, but pixel electrode area is limited
Solution Approach 1:
By moving the reference voltage auxiliary lines from the horizontal plane to vertical stacking across multiple wiring layers, the patent eliminates the need for auxiliary lines to occupy horizontal space between pixel electrodes. This allows pixel electrodes to expand to larger areas while the auxiliary lines maintain their voltage supply function through the multi-layer vertical architecture.
3Reliability
If via holes are used to electrically couple reference voltage auxiliary lines to reference voltage lines, then resistance is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent divides the reference voltage auxiliary lines into multiple segments disposed in different wiring layers, with via holes connecting adjacent segments. This segmentation allows each layer to be manufactured independently using standard thin-film fabrication processes, and the via holes can be formed through conventional etching and filling techniques, making the overall manufacturing process manageable despite the multi-layer complexity.
Solution Approach 2:
The via holes in the patent serve multiple functions: they provide electrical connection between layers, act as alignment references for subsequent fabrication steps, and enable the three-dimensional routing of reference voltage auxiliary lines. This multi-functionality reduces the need for additional specialized structures or processes, thereby mitigating manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances voltage stability and uniformity, reduces resistance, and improves the aperture ratio by allowing for larger or denser pixel electrodes, thus improving the display's performance and efficiency.
Implementation Method 1
the first reference voltage auxiliary line is electrically coupled to the first reference voltage line through a plurality of via holes penetrating through the insulating layer between a layer where the first reference voltage auxiliary line is disposed and a layer where the first reference voltage line is disposed
Data Source
AI summary
There is provided a display substrate, in which, a first reference voltage line and a first reference voltage auxiliary line, which extend in different directions, are respectively disposed in one of a second wiring layer, a third wiring layer and a fourth wiring layer, a second reference voltage line extends in the same direction as the first reference voltage auxiliary line, the first reference voltage auxiliary line is electrically coupled to the first reference voltage line through via holes in an insulating layer therebetween, via a coupling line extending in the same direction as the first reference voltage line, the first reference voltage auxiliary line and the first reference voltage line provide a reset voltage to a first electrode of a first capacitor, and the second reference voltage line provides a reset voltage to a pixel electrode in a pixel electrode layer. A display device is further provided.