OLED Wiring Connection Structure for Contact Hole Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In ultra-high definition (UHD) organic light emitting display (OLED) devices, the small pixel area requires a reduction in the number of contact holes to minimize coupling effects between wirings, but conventional methods often increase the contact area and resistance, complicating efficient electrical connections between different layers.

Innovation Solution

The OLED device incorporates a wiring connection structure with a second gate electrode pattern that is electrically connected to the active layer pattern and first gate electrode pattern via a single contact hole, reducing the number of contact holes and enhancing the contact area and conductivity by extending the contact hole in a specific direction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the number of contact holes is reduced to minimize coupling effects, then the coupling effect between wirings is reduced, but the contact area and resistance increase

Engineering Contradiction:
Improvecoupling effectVSAvoidcontact resistance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent extends the contact hole in a specific direction (one dimension) to increase the contact area. This dimensional extension allows the single contact hole to provide sufficient contact area and low resistance while maintaining the reduced number of contact holes, thus resolving the contradiction between minimizing coupling effects and maintaining low contact resistance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If the pixel area is reduced for ultra-high definition, then the resolution is improved, but the number of contact holes must be reduced which complicates electrical connections

Engineering Contradiction:
ImproveresolutionVSAvoidwiring connection complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the single contact hole by extending it in a specific direction. This extended contact hole simultaneously provides electrical connection between different layers and ensures sufficient contact area, simplifying the wiring connection structure in ultra-high definition displays with reduced pixel areas.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the contact area is increased to reduce resistance, then the contact resistance is reduced, but the number of contact holes must be increased which increases coupling effects

Engineering Contradiction:
Improvecontact resistanceVSAvoidcoupling effect
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent increases the contact area by extending the contact hole in a specific direction rather than increasing the number of contact holes. This dimensional approach allows achieving low contact resistance while maintaining a small number of contact holes, thus avoiding increased coupling effects.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10522780B2Organic light emitting display device
Publication Date: 2019.12.31 SAMSUNG DISPLAY CO LTD
  • US10522780B2 patent drawing
  • US10522780B2 patent drawing
  • US10522780B2 patent drawing

AI summary

An OLED device includes a substrate, a semiconductor element on the substrate and including an active layer, a first gate electrode on the active layer, a second gate electrode on the first gate electrode, and source and drain electrodes, a wiring connection structure electrically connected to the semiconductor element and including an active layer pattern spaced from the active layer and corresponding to a first region, a second region, a third region between the first region and the second region, and a fourth region, a first gate electrode pattern overlapping the active layer pattern and expose active pattern layer at the first region and the second region, and a second gate electrode pattern contacting a portion of the first gate electrode pattern in the third region, and contacting the active layer pattern in the first region, and a sub-pixel structure on the semiconductor element and the wiring connection structure.