Optical Line Termination IC with Distributed Processing for Low Latency PON
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Solution Overview
Problem
In point-to-multipoint networks, particularly in passive optical networks, existing technologies face challenges in minimizing delay and jitter for time-sensitive upstream and downstream transmissions, which are crucial for services like telephony and video/audio broadcasts, while also managing non-time sensitive functions effectively.
Innovation Solution
A line termination unit integrated circuit with a receiver for upstream transmissions, a transmitter for downstream transmissions, and an internal processor for processing overhead fields, utilizing a system-on-a-chip (SoC) subsystem with a distributed direct memory access engine to efficiently manage and process frame formats, ensuring minimal delay and jitter for time-sensitive data and handling non-time sensitive functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all processing functions are handled by a centralized processor, then device complexity is reduced, but delay and jitter for time-sensitive transmissions increase
Solution Approach 1:
The processing functions are segmented into two distinct parts: a centralized processor handles non-time-sensitive functions (bandwidth allocation, ranging, OAM), while distributed processing elements handle time-sensitive functions (frame format processing, payload extraction/assembly). This segmentation allows time-critical operations to be performed locally without waiting for centralized processor availability, thereby reducing delay and jitter while maintaining manageable device complexity through functional distribution.
2Loss of time
If processing is distributed to reduce delay and jitter, then time-sensitive transmission quality improves, but device complexity increases
Solution Approach 1:
The patent merges the benefits of centralized control (simplified management, reduced complexity for non-time-sensitive functions) with distributed processing (low latency for time-sensitive functions). The centralized processor and distributed processing elements are integrated into a unified architecture where the centralized processor orchestrates overall network management while distributed elements handle immediate frame processing, achieving low delay and jitter without proportionally increasing overall system complexity.
3Device complexity
If centralized processing is used for non-time sensitive functions, then device complexity is minimized, but bandwidth allocation efficiency may be reduced
Solution Approach 1:
The centralized processor performs preliminary actions by pre-calculating bandwidth allocation schemes and preparing processing parameters before time-sensitive data arrives. This allows the distributed processing elements to execute bandwidth allocation and frame processing operations efficiently using pre-prepared information, thereby maintaining high productivity without requiring complex real-time decision-making at the distributed level.
Data Source
AI summary
In a line termination unit integrated circuit in a point-to-multipoint network, a receiver receives an upstream transmission from a network termination unit within the point-to-multipoint network, a transmitter transmits a downstream transmission to a network termination unit within the point-to-multipoint network, and an internal processor operatively coupled to the receiver processes sub-fields within the overhead field of the upstream transmission. The internal processor is also operatively coupled to the transmitter to assemble the overhead field of the downstream transmission. The upstream transmission is an upstream transmission convergence frame format having an overhead field and a payload field, and the downstream transmission is a downstream transmission convergence frame format having an overhead field and a payload field.