On-Chip ADC Testing Using Shared Memory and DAC Calibration
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Solution Overview
Problem
The production testing of analog-mixed signal circuits on a chip is time-consuming, and existing methods for on-chip testing face challenges due to limited on-chip memory, which restricts the ability to perform comprehensive testing of analog-to-digital converters (ADCs) like sigma delta ADCs and successive approximation register ADCs.
Innovation Solution
The implementation of built-in self-test (BIST) circuitry that utilizes a memory engine to efficiently manage and interleave calibration data and test data within a size-constrained on-chip RAM, allowing for on-chip testing of both high-resolution and lower-resolution ADCs by overwriting calibration data as needed, ensuring mutually exclusive memory operations in time and addressing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If on-chip testing is performed using available on-chip memory, then the number of external devices is reduced and testing speed is improved, but the memory size is constrained and cannot store all required calibration data and test data
Solution Approach 1:
The patent segments the testing process into multiple passes, where different sets of ADCs are tested in sequence. The memory is divided into regions for calibration data and test data, with the ability to overwrite calibration data for DACs that are not currently being used in the active test pass. This segmentation allows comprehensive testing of multiple ADC types without requiring memory for all calibration data simultaneously.
Solution Approach 2:
The patent implements dynamic memory allocation where the memory regions for calibration data and test data can be flexibly adjusted based on the current testing requirements. The system dynamically determines which calibration data to retain and which to overwrite based on the active test pass, allowing the memory usage to adapt to different testing scenarios rather than being fixed.
2Reliability
If calibration data for all DACs is stored in on-chip memory, then complete testing capability is maintained, but no room remains for storing intermediate test data
Solution Approach 1:
The patent performs preliminary organization of calibration data in memory before testing begins. The memory is pre-configured with calibration data arranged in a specific pattern that allows efficient access during testing. This preliminary setup enables the system to quickly switch between different calibration data sets and perform overwrites without disrupting the testing flow, maintaining both completeness and efficiency.
3Measurement precision
If multiple sets of ADCs with different resolutions are tested using full N-bit DAC resolution, then accurate testing is achieved, but excessive memory is required for calibration codes
Solution Approach 1:
The patent applies local quality by matching the DAC resolution to the specific ADC being tested. Instead of using full N-bit DAC resolution for all ADCs, the system uses reduced M-bit resolution for ADCs that require less precision. This localized adaptation of resolution reduces the number of calibration codes needed in memory while maintaining the accuracy required for each specific ADC type.
Data Source
AI summary
Analog-to-digital converters (ADCs) of an integrated circuit includes a first set of ADCs and second set of ADCs in which the ADCs of the first set are of a different type than the ADCs of the second set. On-chip testing of the ADCs includes calibrating an N-bit differential digital-to-analog converter (DAC) and storing a pair of calibration codes for each of 2N possible DAC input codes for the DAC in an on-chip memory. The first set of ADCs is tested using the pairs of calibration codes stored in the on-chip memory and a full N-bit resolution of the DAC. Subsequently, the second set of ADCs is tested using pairs of calibration codes corresponding to a reduced M-bit resolution of the DAC, in which M is less than N. During the testing of the second set of ADCs, a portion of the calibration codes stored in the on-chip memory is overwritten.