On-Chip Bandwidth Allocator Using Packet Header Tagging
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Solution Overview
Problem
Conventional on-chip communication networks face challenges in efficiently allocating shared resources for data packet routing due to complex reservation methods and limitations in scalability and performance, particularly in handling multiple data flows with varying priorities.
Innovation Solution
A real-time bandwidth allocator that populates data packet headers with requested bandwidth information and uses a processor-controlled router system to manage resource allocation based on priority, allowing flexible use of arbitration strategies like WRR or priority schemes, enabling efficient routing and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reservation of connections is used for routing data, then quality of service can be guaranteed, but the arrangement becomes complicated and costly
Solution Approach 1:
The patent extracts the bandwidth allocation information from complex connection reservation arrangements and places it directly in packet headers. This allows QoS to be tracked through packet tagging rather than through complex reserved connection paths, simplifying the network architecture while maintaining service quality guarantees.
Solution Approach 2:
The patent changes the parameter representation from complex connection reservation states to simple bandwidth allocation values in packet headers. By encoding bandwidth information directly in packets and using priority bits to represent different service levels, the system achieves QoS guarantees with simpler, more scalable architecture.
2Device complexity
If packet switched networks are used for routing data, then resource reservation complexity is reduced, but resources may not be allocated efficiently for multiple data flows with varying priorities
Solution Approach 1:
The patent applies preliminary action by pre-tagging packets with bandwidth allocation information and priority bits before they enter the network. This allows routers to make efficient resource allocation decisions based on pre-computed priority values without complex real-time negotiations, combining the simplicity of packet switching with efficient resource allocation for multiple data flows.
3Ease of operation
If conventional arbitration logic is used to allocate shared resources, then packets are sorted by priority bits, but all data with the same priority level are not tagged with information bits making it difficult to gather and concentrate data flows
Solution Approach 1:
The patent merges the priority indication function with bandwidth allocation information by using the same header field for both purposes. Packets with the same priority level share the same bandwidth allocation tag, enabling easy identification and concentration of data flows belonging to the same flow without requiring separate tagging mechanisms.
4Loss of information
If tagging is applied to beginning and/or end of packet groups to identify data flows, then data flows can be identified, but composition rules become non-trivial to implement
Solution Approach 1:
The patent segments the bandwidth allocation information into fixed-width fields within the packet header, with each field representing a specific flow identifier. This segmentation allows routers to easily compare and match packets belonging to the same flow using simple field equality checks, avoiding complex composition rules while maintaining complete data flow identification.
Data Source
AI summary
A bandwidth allocator to allocate in real time shared resources of a network on-chip is disclosed. The bandwidth allocator routes data packets between elements of the network in response to requests to access the shared resources. The bandwidth allocator could include a plurality of network interfaces to process the data packets to be routed within the network and a plurality of routers for routing the data packets through the network. A processor, distributed within the routers, controls the routers and the transmission of each data of the data packets through the routers to provide a bandwidth for each data flow. The network interfaces is adapted to fill a header field of each data packet with header field information depending on a requested bandwidth. The processor controls the transmission of the data packets through the routers as a function of the value of the header field information of each data packet.