On-Chip Calibration Circuit for Stable Parameter Generation
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Solution Overview
Problem
Integrated circuit chips experience significant chip-to-chip variations in calibrated parameters due to temperature and age-induced changes, leading to yield loss, as existing calibration methods are only performed at wafer level test and a single nominal temperature.
Innovation Solution
An on-chip parameter generation system with an integrated calibration circuit that automatically, sequentially, and repeatedly calibrates parameter generators, minimizing temperature-induced and age-induced variations by enabling calibration in real-world operating conditions throughout the life of the IC chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If calibration is performed only at wafer level test and single nominal temperature, then manufacturing process is simple and fast, but chip-to-chip parameter variations increase significantly under real-world operating conditions
Solution Approach 1:
The system performs preliminary calibration at wafer level test to establish initial parameter values, then uses periodic in-situ calibration during operation to correct for temperature and aging effects. This two-stage approach combines the speed of preliminary calibration with the accuracy of ongoing adjustments.
Solution Approach 2:
The calibration circuit performs calibration periodically at predetermined intervals during chip operation, rather than continuously or only once during manufacturing. This periodic action maintains parameter accuracy while minimizing impact on productivity by calibrating only when necessary.
2Device complexity
If calibration is performed at single nominal temperature during wafer level test, then calibration process is simple and quick, but temperature-induced parameter variations cause significant chip-to-chip deviations in real applications
Solution Approach 1:
The calibration system adapts to dynamic operating conditions by performing calibration at multiple temperature points during periodic operations. The calibration circuit adjusts parameters based on actual temperature measurements, making the system dynamic rather than static, thereby maintaining reliability across varying temperatures.
Solution Approach 2:
The system changes calibration parameters based on operating temperature by performing calibration at multiple temperature points. The calibration circuit modifies parameter values according to the measured temperature, ensuring accurate operation across the full temperature range rather than relying on a single nominal temperature calibration.
3Quantity of substance
If device size is scaled down to 14nm and 7nm technology nodes, then device density and integration increase, but potential swing in calibrated voltage increases chip-to-chip variations by 100mV or more
Solution Approach 1:
The calibration circuit uses feedback from voltage measurements to automatically adjust calibration parameters. By measuring the actual voltage output and comparing it to the target value, the system computes correction factors that compensate for process variations inherent in scaled devices, thereby maintaining voltage calibration precision despite device density increases.
4Reliability
If automatic sequential repeated calibration is implemented throughout chip life, then parameter accuracy is maintained under real-world conditions, but system complexity and calibration time increase
Solution Approach 1:
The calibration circuit is fully integrated on-chip and performs calibration autonomously without requiring external equipment or manual intervention. The system self-manages the calibration process by monitoring its own parameters and automatically adjusting them, which maintains high reliability while avoiding the added complexity of external calibration systems.
Solution Approach 2:
Rather than continuous calibration that would increase complexity and time consumption, the system performs calibration periodically at predetermined intervals. This periodic approach maintains parameter accuracy by correcting drift when necessary while minimizing the impact on system complexity and operational time.
Data Source
AI summary
Disclosed are embodiments of an integrated circuit (IC) chip that includes an on-chip parameter generation system. The system includes multiple parameter generators (e.g., voltage generators, current generators, capacitance generators, etc.) and an integrated calibration circuit. The calibration circuit is configured to automatically, sequentially, and repeatedly calibrate the parameter generators in order to minimize chip-to-chip variations in parameters supplied to other on-chip components under real world operating conditions throughout the life of the IC chip. In other words, the integrated calibration circuit effectively minimizes temperature-induced chip-to-chip variations, age-induced chip-to-chip variations, etc. in parameters generated by the on-chip parameter generators. Also disclosed herein are embodiments of an associated method.