On-Chip Capacitance Measurement Using a Relaxation Oscillator
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Solution Overview
Problem
Existing methods for measuring on-chip capacitance in integrated circuits face challenges such as inaccuracy, long settling times, and increased chip area due to nonidealities in comparator measurements and the need for large on-chip capacitances, especially in low-supply-voltage environments.
Innovation Solution
A method involving disconnecting the target capacitance from the main circuit and connecting it to a relaxation oscillator for measurement, using digitally controlled switches and dedicated circuitry to measure charging/discharging currents, supply voltage, and output frequency, allowing for high-accuracy capacitance calculation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transient current measurement is used for capacitance measurement, then measurement can be performed, but comparator nonidealities cause capacitance over-charge and over-discharge leading to measurement inaccuracy and oscillatory settling
Solution Approach 1:
The patent extracts the problematic comparator from the measurement system and replaces it with a current source and voltage detector configuration. The capacitance measurement is performed by detecting the voltage across the capacitor during controlled charging/discharging cycles, eliminating the comparator's finite gain and delay issues that caused over-charge and over-discharge.
Solution Approach 2:
The patent introduces an intermediary measurement approach using a voltage detector to monitor the capacitor voltage during controlled current charging/discharging. This intermediary method avoids direct comparator measurement and provides stable, accurate capacitance values by measuring the time required for voltage to reach specific thresholds during controlled current cycles.
2Measurement precision
If average current measurement is used to infer capacitance, then capacitance can be calculated, but large on-chip capacitances are required for filtering which increases settling time
Solution Approach 1:
The patent employs periodic charging and discharging current cycles to measure capacitance. By applying periodic current pulses and measuring the voltage response at specific time points within each cycle, the system can calculate capacitance without requiring large filtering capacitances, thus reducing settling time while maintaining measurement accuracy.
Solution Approach 2:
The patent transitions from static average current measurement to dynamic voltage monitoring during controlled current charging/discharging cycles. By measuring voltage at specific dynamic points in the charging/discharging process, the system eliminates the need for large on-chip filtering capacitances and reduces settling time.
3Measurement precision
If low injection frequency is used to minimize comparator error, then measurement accuracy improves, but larger on-chip capacitance is required which further increases measurement time
Solution Approach 1:
The patent replaces the mechanical/comparator-based measurement system with an electronic current source and voltage detection system. This substitution allows for controlled current charging/discharging at optimized frequencies, eliminating the trade-off between frequency and capacitance size that existed in comparator-based systems.
Solution Approach 2:
The patent changes the measurement parameters from comparator voltage thresholds to controlled current levels and voltage detection thresholds. By controlling the current amplitude and measuring voltage response, the system can operate at optimal frequencies without requiring large capacitance values, thus improving both accuracy and measurement speed.
4Measurement precision
If large current spikes are handled by CMOS transistors and drivers for charging/discharging, then capacitance measurement can be performed, but chip area increases
Solution Approach 1:
The patent uses controlled current sources that provide exactly the required charging/discharging current without excessive current capacity. By sizing the current sources appropriately for the specific measurement range needed, the system avoids the large transistor and driver circuits required for handling potential large current spikes, thus reducing chip area.
Solution Approach 2:
The patent uses small test capacitors connected through switches to represent and measure the capacitance of larger on-chip capacitors. Instead of directly measuring large capacitances that would require large current handling circuitry, the system copies the measurement setup with smaller capacitors and scales the results, reducing the required chip area for current handling components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate, low-power, and small-area on-chip capacitance measurement with reduced measurement time, suitable for tuning crystal oscillators in integrated circuits.
Implementation Method 1
connecting the target capacitance to a relaxation oscillator on the integrated circuit; measuring an output of the relaxation oscillator
Implementation Method 2
measuring the target capacitance based on an output frequency of the relaxation oscillator; measuring the target capacitance further based on a measured voltage and measured currents of the relaxation oscillator
Data Source
AI summary
An on-chip capacitance measurement method and associated systems and devices are provided. Embodiments described herein rely on using the capacitor under test in an on-chip relaxation oscillator configuration whose charging/discharging currents, supply voltage, and output frequency are measured individually in a measurement block. The voltage thresholds of the relaxation oscillation are calculated from the circuit elements and the measured supply voltage. Because the oscillation frequency of the relaxation oscillator is a function of the capacitance under test, the charging/discharging currents, and the supply voltage (via voltage thresholds), the capacitance under test can be calculated using the measured values of the other quantities. Embodiments described herein provide an accurate, low-power, small-area on-chip system capable of measuring capacitance with high accuracy. An algorithm employing the above method and apparatus for tuning a crystal oscillator is also provided. Relevant circuit implementations used in the on-chip measurement system are also disclosed.