On-Chip Data Recovery for Non-Volatile Storage via Cross-Word-Line Parity

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Solution Overview

Problem

Non-volatile storage devices face challenges in accurately reading data from word lines due to defects such as shorts between the word line and the substrate or between adjacent word lines, which can prevent successful data recovery even with Error Correction Codes (ECC).

Innovation Solution

The implementation of calculating and storing parity bits across additional word lines allows for data recovery from defective word lines by using the data from other word lines in the group, enabling recovery even with severe defects like word line to substrate or word line to word line shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC is used to correct read errors, then data reliability is improved, but device complexity increases due to additional memory cells required for ECC storage

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the ECC storage function with the data storage structure by placing parity bits at the end of each word line within the same memory array, rather than using separate dedicated ECC memory cells. This integration allows the memory device to maintain data reliability through error correction while avoiding the additional complexity and space that would result from separate ECC storage structures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extends the error correction capability from traditional per-word-line ECC to a cross-word-line parity system. By adding parity bits that span multiple word lines and using inter-leaved read patterns, the system achieves more robust error correction without proportionally increasing the storage overhead, effectively adding correction capability in a dimensional sense rather than simply multiplying storage requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If more bits are stored in ECC to make recovery more robust, then data reliability is improved, but the quantity of memory cells increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidquantity of memory cells
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent implements a partial parity system where not all possible error conditions are corrected, but the most common and critical errors (such as word line shorts) are addressed through the inter-leaved read pattern and cross-word-line parity bits. This partial approach provides sufficient reliability for practical applications without requiring the maximum possible ECC overhead, achieving adequate error correction with minimal additional memory cells.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If traditional ECC is used for data recovery, then data can be corrected, but recovery fails when too many misreads occur

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidadaptability to defect severity
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent performs preliminary action by reading data from multiple word lines in an inter-leaved pattern before attempting error correction. By reading both the defective word line and adjacent word lines that contain parity information, the system prepares redundant data in advance, allowing the recovery process to handle a higher number of misreads and severe defects without failing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces parity bits stored in adjacent word lines as an intermediary element that mediates between the defective word line and the data recovery process. These parity bits serve as a bridge, providing the information needed to reconstruct corrupted data without requiring direct access to the defective locations, thereby enabling recovery even when the number of misreads exceeds traditional ECC capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8839074B2On chip data recovery for non-volatile storage
Publication Date: 2014.09.16 SANDISK TECHNOLOGIES LLC
  • US8839074B2 patent drawing
  • US8839074B2 patent drawing
  • US8839074B2 patent drawing

AI summary

Methods and devices for recovering data stored in a non-volatile storage device are provided. Data may be recovered for memory cells associated with a word line that cannot be read using ECC that was calculated based on the data stored on that word line. This allows recovery for situations such as a word line shorting to the substrate or two adjacent word lines shorting together. When programming memory cells associated with a group of word lines, parity bits may be calculated and stored in memory cells associated with an additional word line in the memory device. When reading memory cells associated with one of the word lines in the group, an otherwise unrecoverable error may occur. By knowing which word line is defective, its data may be recovered using the parity bits and the data of all of the other word lines in the group.