On-Chip Data Scrambler for Non-Volatile Memory Reliability
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Solution Overview
Problem
Non-volatile memory devices face reliability issues due to worst-case data patterns that trigger memory program failures, leading to uncorrectable error correction code decoding and program disturb problems.
Innovation Solution
Incorporating built-in on-chip scrambling and descrambling circuitry in non-volatile memory systems, which generates and uses different keys to encode and decode data, randomizing data distribution and avoiding worst-case patterns by storing user data in corresponding locations with non-user data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is stored in non-volatile memory without scrambling, then storage simplicity is maintained, but memory reliability deteriorates due to worst-case data patterns causing program failures and uncorrectable errors
Solution Approach 1:
The patent applies preliminary action by performing data scrambling before the data is written to non-volatile memory. The scrambler circuit processes the data in advance to transform worst-case patterns into safer patterns, preventing program failures and uncorrectable errors before they occur. This proactive approach ensures memory reliability without requiring complex error correction during operation.
Solution Approach 2:
The patent introduces an intermediary approach by incorporating a dedicated scrambler circuit between the data source and the memory array. This intermediary component handles the complexity of pattern transformation, isolating the memory system from the complexity of data pattern management. The scrambler acts as a mediator that protects the memory from harmful data patterns while maintaining simple memory architecture.
2Reliability
If data scrambling is implemented to prevent worst-case patterns, then memory reliability improves, but data access time increases due to additional encoding and decoding operations
Solution Approach 1:
The patent applies self-service by implementing the scrambler and descrambler circuits directly within the memory device itself rather than externally. The scrambler is integrated into the memory array structure, allowing it to operate automatically during write operations without requiring external processing time. Similarly, the descrambler is built into the read path, enabling automatic decryption during read operations. This integration minimizes the time overhead as the scrambling operations occur during the natural memory access cycles.
3Reliability
If multiple keys are generated for different data portions, then data security and reliability improve, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies segmentation by dividing the data into multiple portions and generating different keys for each portion. The data is segmented into blocks, and a dedicated key generation circuit creates unique keys for different data segments. This segmentation approach improves data reliability by ensuring that each data portion is scrambled with appropriate keys, preventing worst-case patterns from propagating across the entire data set. The segmentation is implemented through modular circuit design that can be systematically manufactured.
Data Source
AI summary
A non-volatile memory in which data is randomized before being stored in the non-volatile memory to minimize data pattern-related read failures. Randomizing is performed using circuitry on the memory die so that the memory die is portable relative to an external, off-chip controller. Circuitry on the memory die scrambles user data based on a key which is generated using a seed which is shifted according to a write address. Corresponding on-chip descrambling is also provided.