On-Chip Differential Inductor with Parallel Metallization
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Solution Overview
Problem
Conventional on-chip differential inductor devices require additional processing steps and specialized structures, increasing production costs and complexity, while also having lower Q-factors due to interactions with the semiconductor substrate.
Innovation Solution
A high Q-factor on-chip differential inductor device design featuring a single octagonal winding with parallel-connected metal lines across multiple metallization levels and polysilicon shielding to reduce substrate interactions and series resistance, allowing for formation without additional processing steps beyond those for the rest of the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional on-chip differential inductor devices use specialized structures with unconventionally thick metal lines, then the Q-factor is improved, but the device complexity and manufacturing cost increase due to additional processing steps
Solution Approach 1:
The patent applies universality by designing the inductor device to use the same metallization structure already present in the rest of the integrated circuit. The inductor utilizes multiple standard metallization levels (first through fourth levels) that are also used for other circuit components, eliminating the need for specialized thick metal lines or additional processing steps while achieving high Q-factor performance
2Loss of energy
If conventional on-chip differential inductor devices use specialized structures, then the electrical resistance is reduced, but the manufacturing cost increases due to additional processing steps
Solution Approach 1:
The patent merges the inductor structure with the standard integrated circuit metallization system. The inductor uses parallel connections of metal lines across multiple standard metallization levels (first through fourth levels), combining the functions of multiple thin layers to achieve the electrical performance previously requiring specialized thick metal lines, thereby avoiding additional manufacturing costs
3Reliability
If conventional on-chip differential inductor devices are designed with specialized structures, then the Q-factor is improved, but the production time increases due to additional processing steps
Solution Approach 1:
The patent applies preliminary action by designing the inductor to utilize the metallization structure that is already prepared during the standard integrated circuit fabrication process. The inductor patterns are formed using the existing metallization levels and processes, so the high Q-factor structure is created as part of the normal manufacturing sequence without requiring additional processing steps or extended production time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a high Q-factor and reduced substrate losses, enabling efficient differential signal operation with improved inductance values and immunity to noise, while maintaining compatibility with conventional integrated circuit manufacturing processes.
Implementation Method 1
The first winding portion of the inductor device comprises a first metal line formed on the first metallization level and a second metal line formed on the second metallization level, the first metal line being electrically connected in parallel with the second metal line
Implementation Method 2
polysilicon shielding to reduce substrate interactions and series resistance
Implementation Method 3
A high Q-factor on-chip differential inductor device design featuring a single octagonal winding
Data Source
AI summary
An inductor device in an integrated circuit includes a first winding portion, a bridge portion and a second winding portion. The integrated circuit has a first, a second, a third and a fourth metallization level. The first winding portion comprises a first metal line formed on the first metallization level and a second metal line formed on the second metallization level, the first metal line being electrically connected in parallel with the second metal line. The bridge portion comprises a third metal line formed on the third metallization level and a fourth metal line formed on the fourth metallization level, the third metal line being electrically connected in parallel with the fourth metal line. The second winding portion comprises a fifth metal line formed on the first metallization level and a sixth metal line formed on the second metallization level, the fifth metal line being electrically connected in parallel with the sixth metal line. The bridge portion electrically connects the first winding portion to the second winding portion.