On-Chip Dynamic Read Level Adjustment for Non-Volatile Memory
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Solution Overview
Problem
Conventional methods for dynamically determining read levels in non-volatile memory devices are time-consuming and require substantial computations, often necessitating data transfer out of the memory array and error correction code processing, which can lead to increased error rates due to shifting threshold voltage distributions as memory arrays scale down.
Innovation Solution
The method involves dynamically determining read levels on-chip without transferring data off the memory die, by performing initial and subsequent reads at adjusted levels and comparing results to determine suitable read levels, thereby minimizing mis-reads and eliminating the need for external controllers or error correction algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods for dynamically determining read levels are used (reading data out and performing ECC computations), then threshold voltage distribution shifts can be corrected, but the process becomes time-consuming and requires substantial computations
Solution Approach 1:
The patent extracts only the essential information needed for read level determination by comparing results from two reads performed at different levels, rather than performing full ECC computations on all data. This extraction approach identifies mis-compares (bits that differ between reads) to dynamically adjust read levels, significantly reducing computational time while maintaining read accuracy.
Solution Approach 2:
The patent performs a preliminary read at a first read level before the actual data retrieval, using this initial read to determine how to adjust subsequent read levels. This preliminary action allows the system to adapt read levels dynamically without waiting for full data transfer and computation, reducing overall processing time.
2Reliability
If data is transferred out of the memory array for error correction processing, then read errors can be corrected, but the process complexity increases and requires external controllers
Solution Approach 1:
The patent implements self-service by performing read level determination entirely within the memory device using internal resources. The system compares results from two reads at different levels, identifies mis-compares, and adjusts read levels autonomously without requiring external controllers or complex error correction algorithms, thereby reducing system complexity while maintaining reliability.
Solution Approach 2:
Instead of performing complete ECC processing on all data, the patent applies partial action by only processing the specific information needed for read level adjustment (the mis-compares between two reads). This selective approach achieves the necessary error correction functionality with reduced computational complexity.
3Quantity of substance
If memory arrays are scaled down to increase density, then storage capacity improves, but threshold voltage distributions shift more frequently causing increased read errors
Solution Approach 1:
The patent applies dynamics by making read levels adjustable rather than fixed. The system dynamically determines read levels by comparing results from two reads performed at different levels and adjusting based on mis-compares. This dynamic adaptation allows the system to compensate for threshold voltage distribution shifts that occur more frequently in scaled-down memory arrays, maintaining read stability despite increased density.
Data Source
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AI summary
Dynamically determining read levels on chip (e.g., memory die) is disclosed herein. One method comprises reading a group of non-volatile storage elements on a memory die at a first set of read levels. Results of the two most recent of the read levels are stored on the memory die. A count of how many of the non-volatile storage elements in the group showed a different result between the reads for the two most recent read levels is determined. The determining is performed on the memory die using the results stored on the memory die. A dynamic read level is determined for distinguishing between a first pair of adjacent data states of the plurality of data states based on the read level when the count reaches a pre-determined criterion. Note that the read level may be dynamically determined on the memory die.