On-Chip ESD Protection Circuit for Band Pass Filter

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Solution Overview

Problem

Band pass filters (BPFs) in mobile communications are vulnerable to electrostatic discharge (ESD) damage, leading to reduced yield and performance issues, particularly due to the cost and limited reusability of ESD protection diodes, and the need for off-chip ESD protection in 2.5D or 3D IC applications.

Innovation Solution

An on-chip ESD protection circuit using LC parallel resonators provides simultaneous ESD protection and impedance matching, eliminating the need for active ESD devices and off-chip protection, reducing power consumption and enabling reusable BPF topologies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ESD protection diodes are used to protect BPF, then ESD damage is mitigated, but die area increases significantly and reusability is limited

Engineering Contradiction:
ImproveESD protectionVSAvoiddie area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines ESD protection function with impedance matching function into a single integrated circuit block. The ESD protection circuit is merged with the BPF impedance matching network, allowing both functions to be performed by the same circuit elements without requiring separate ESD protection diodes that would consume additional die area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ESD protection circuit is designed to serve multiple purposes: it provides ESD protection while simultaneously functioning as an impedance matching network for the BPF. This multi-functional design eliminates the need for dedicated ESD protection components and optimizes the overall circuit performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If plug-and-play ESD diodes are used for ESD protection, then ESD damage is reduced, but cost increases and performance standards require significant die area

Engineering Contradiction:
ImproveESD protectionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The ESD protection functionality is merged into the existing BPF circuit architecture rather than being added as a separate plug-and-play component. This integration reduces overall device complexity by eliminating the need for additional discrete ESD protection diodes and their associated packaging and interconnection requirements.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If off-chip ESD protection is used in 2.5D or 3D IC applications, then ESD damage is protected, but additional processes and components are required

Engineering Contradiction:
ImproveESD protectionVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The ESD protection function is segmented and integrated directly into the chip-level circuit design rather than being implemented as a separate off-chip component. This allows ESD protection to be manufactured as part of the standard IC fabrication process, eliminating the need for additional assembly steps and external protection components in 2.5D or 3D IC applications.

Inventive Principle:
Principle #1Segmentation

4Manufacturing precision

If smaller tailored BPFs are designed for specific device applications, then device-specific performance is optimized, but reusability across different applications is limited

Engineering Contradiction:
Improveperformance optimizationVSAvoidreusability
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The integrated ESD protection circuit with impedance matching capability is designed as a universal building block that can be applied across different BPF designs and applications. The circuit topology and design methodology can be reused for various frequency ranges and application scenarios, reducing design time and ensuring consistent performance while maintaining application-specific optimization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The on-chip ESD protection circuit enhances BPF performance by maintaining high selectivity and bandwidth, reducing insertion loss, and allowing for co-optimization of ESD and BPF performance, while eliminating the need for additional processes and active ESD devices.

Implementation Method 1

A first ESD protection device is coupled to the input node, and a second ESD protection device is coupled to the output node. Each ESD protection device comprises an inductor and a capacitor configured in parallel between an input and ground.

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

Each ESD protection device is configured to operate as transparent for signals in a voltage range of normal operation of the filter and as a bypass circuit for signals in an elevated voltage range.

Methodology Applied
Scientific EffectLC resonance: Resonance

Data Source

PatentUS9093977B2Integrated passive device filter with fully on-chip ESD protection
Publication Date: 2015.07.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9093977B2 patent drawing
  • US9093977B2 patent drawing
  • US9093977B2 patent drawing

AI summary

The present disclosure relates to an on-chip electrostatic discharge (ESD) protection circuit that may be reused for a variety of integrated circuit (IC) applications. Both inductor-capacitor (LC) parallel resonator and shunt inductor (connected to ground) are used as ESD protection circuits and also as a part of an impedance matching network for a given IC application. The ESD LC resonator can be designed with a variety of band pass filter (BPF) topologies. On-chip ESD protection circuit allows for co-optimization ESD and BPF performance simultaneously, a fully on-chip ESD solution for integrated passive device (IPD) processes, eliminates a need for active ESD device protection, additional processes to support off-chip ESD protection, reduces power consumption, and creates a reusable BPF topology.