On-Chip Harmonic Filtering Circuit With Tunable RF Matching
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Solution Overview
Problem
Existing RF communication devices rely on off-chip harmonic rejection filters, which increase cost and size due to the need for external components, while on-chip tunable passive techniques for harmonic filtering are not easily implementable due to low quality (Q) factors and lack of tunability.
Innovation Solution
An on-chip harmonic filtering and matching circuit is introduced, utilizing a first capacitance in parallel with a first inductance, a second inductance, and a variable second capacitance to provide both impedance matching and filtering, with coarse-tune and fine-tune control signals to adjust impedance matching and filtering respectively, allowing for the removal of off-chip filtering components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If off-chip harmonic rejection filters are used, then harmonic filtering performance is improved, but device size and cost increase due to external components
Solution Approach 1:
The patent combines the harmonic rejection filter function with the on-chip matching network by adding a second variable capacitance to the existing matching network topology. This integration eliminates the need for separate off-chip filtering components, thereby reducing device size and component count while maintaining effective harmonic filtering performance through the combined circuit structure
Solution Approach 2:
The enhanced matching network is designed to perform multiple functions simultaneously: impedance matching and harmonic filtering. By configuring the second variable capacitance to provide both matching and filtering capabilities, the circuit achieves multi-functionality, eliminating the need for dedicated separate filtering components and reducing overall device complexity
2Area of stationary object
If on-chip tunable passive techniques are used for harmonic filtering, then device size is reduced, but filtering effectiveness deteriorates due to low quality (Q) factors and lack of tunability
Solution Approach 1:
The patent implements dynamic tunability in the on-chip filtering circuit by incorporating a second variable capacitance that can be adjusted via control signals. This dynamic adjustment capability allows the filtering characteristics to be optimized for different operating conditions, overcoming the limitation of fixed passive filters and enabling effective harmonic rejection without requiring large off-chip components
Solution Approach 2:
The patent changes the electrical parameters of the filtering circuit by introducing a variable capacitance element whose capacitance value can be modified through control signals. This parameter adjustment capability enables the circuit to maintain high filtering effectiveness across different operating frequencies and conditions, compensating for the typically low Q-factors of on-chip passive components
3Object-affected harmful factors
If separate on-chip matching and filtering circuits are used, then filtering performance is improved, but device complexity increases
Solution Approach 1:
The patent merges the matching network and harmonic rejection filter into a single integrated circuit structure. By sharing common components (inductors and first variable capacitance) and adding only one additional variable capacitance element, the design achieves effective filtering performance while minimizing the increase in circuit complexity compared to separate implementations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient on-chip harmonic filtering and impedance matching, reducing the size and cost of RF communication devices by integrating filtering functions within the integrated circuit, while maintaining effective rejection of harmonics like third harmonics of the transmit frequency.
Implementation Method 1
the second variable capacitance is adjusted in response to a coarse-tune control signal to provide the impedance matching
Implementation Method 2
the second variable capacitance is adjusted in response to a fine-tune control signal to determine the filtering
Data Source
AI summary
Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. A filtering and matching circuit for an integrated circuit includes a first capacitance coupled in parallel with a first inductance, a second inductance coupled to the first inductance, and a variable second capacitance coupled between the first and second inductance. The variable second capacitance is controlled to provide filtering with respect to the RF signal as well as impedance matching with respect to a load coupled to the connection pad. For one embodiment, the variable second capacitance includes a coarse-tune variable capacitor circuit and a fine-tune variable capacitor circuit. The coarse-tuning controls impedance matching, and the fine tuning controls a notch for the filtering. The load can be an antenna for the RF communications. The integrated circuit can include a receive path, a transmit path, or both.