On-Chip Helix Antenna Gain via 3D Electrode Stacking
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Solution Overview
Problem
Conventional on-chip patch antennas for millimeter wave communication have limited performance with low gain (about 5 dBi) and large size, which are costly and inefficient for system-on-chip applications.
Innovation Solution
The design of an on-chip rectangular helix antenna with folded grounding and implementation in a micro-electromechanical system (MEMS) or extended waveguide, which includes upper and lower electrodes connected by side electrodes, providing a continuous spiraling electrode structure with improved directivity and gain, and utilizing a dielectric waveguide to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional patch antenna is used for millimeter wave communication, then the antenna can be integrated on-chip, but the gain is limited to about 5 dBi and the size is large
Solution Approach 1:
The patent transitions from a conventional two-dimensional patch antenna to a three-dimensional helical structure by adding vertical dimension through multiple stacked layers and folded grounding. This dimensional change enables the antenna to achieve higher gain (10 dBi or more) while maintaining a compact footprint on the chip, effectively resolving the contradiction between gain improvement and size reduction.
Solution Approach 2:
The patent implements a nested structure where the helical antenna pattern is formed by stacking multiple electrode layers vertically, with each layer containing electrodes that spiral around a central axis. The folded grounding structure further nests conductive paths within the limited chip area, allowing the antenna to pack more electrical length into a smaller physical footprint, thereby achieving higher gain without proportionally increasing size.
2Area of stationary object
If the antenna size is reduced for better integration, then chip area is saved, but antenna performance and gain are degraded
Solution Approach 1:
By exploiting the vertical dimension through stacked electrode layers and folded grounding, the patent achieves an effective electrical length sufficient for high-performance antenna operation within a reduced horizontal footprint. This allows the antenna to maintain or improve gain performance while occupying less chip area compared to conventional planar designs.
Solution Approach 2:
The patent employs a composite structure combining multiple conductive layers, dielectric materials, and folded grounding paths to create a helical antenna system. This composite approach enables the antenna to achieve high gain performance in a compact form factor by optimizing the interaction between different materials and structural elements within the limited chip area.
Data Source
AI summary
An antenna includes a plurality of upper electrodes in a first metal layer, a plurality of lower electrodes in a second metal layer, a plurality of side electrodes connecting the upper electrodes with the lower electrodes, and a ground structure. The upper electrodes, the lower electrodes and the side electrodes form one continuous electrode. The continuous electrode extends in a first direction away from a reference plane over a substrate. The upper electrodes extend in a second direction different from the first direction. The upper electrodes, the lower electrodes, and the side electrodes are embedded within a waveguide structure that includes a dielectric material. The substrate has a length extending in the first direction greater than a length the continuous electrode extends in the first direction. The waveguide structure includes a portion of the substrate in a region beyond the length of the continuous electrode in the first direction.