On-Chip Jitter Creation Module for IC Testing
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Solution Overview
Problem
Traditional external test equipment for measuring jitter tolerance in communications systems is expensive, time-consuming, and limited in availability, making it inefficient for testing high-speed communication components.
Innovation Solution
An integrated circuit with a transmitter, receiver, and a jitter creation module that introduces jitter internally, allowing for on-chip testing of jitter tolerance, which can be selectively powered on for testing and off for normal operation to conserve power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external test equipment is used for jitter tolerance testing, then measurement accuracy is improved, but cost increases significantly
Solution Approach 1:
The jitter creation function is extracted from external test equipment and integrated directly into the device under test through a dedicated jitter creation module. This module generates jitter signals internally using a jitter input signal, eliminating the need for expensive external jitter injection equipment while maintaining measurement accuracy through controlled jitter introduction at specific points in the signal path.
Solution Approach 2:
The device under test performs self-testing by incorporating a jitter creation module that generates jitter signals internally. The device monitors its own performance under jitter conditions without requiring external test equipment, thereby reducing testing costs while maintaining measurement validity through standardized jitter generation methods.
2Measurement precision
If external test equipment is used for jitter tolerance testing, then measurement capability is improved, but testing time increases
Solution Approach 1:
The jitter creation module is pre-integrated into the device under test, with jitter generation capability built-in before actual testing begins. This preliminary integration allows immediate jitter injection and measurement without the setup time required for external equipment connection and configuration, significantly reducing total testing time while maintaining measurement capability.
3Measurement precision
If external test equipment is used for jitter tolerance testing, then testing capability is improved, but availability decreases
Solution Approach 1:
The jitter creation functionality is extracted from shared external test equipment and embedded directly within each device under test. This eliminates the single-point bottleneck of external equipment, allowing multiple devices to be tested simultaneously or in rapid succession without scheduling conflicts, thereby significantly improving testing availability and throughput.
4Measurement precision
If jitter creation module is always powered on for testing, then testing capability is improved, but power consumption increases
Solution Approach 1:
The jitter creation module is designed with dynamic power management, being selectively enabled only during jitter tolerance testing operations and disabled during normal device operation. This dynamic switching ensures full testing capability when needed while minimizing power consumption during standard operational periods, resolving the contradiction between testing capability and energy efficiency.
Data Source
AI summary
Systems and methods that facilitate on-chip testing are provided. An integrated circuit can include a transmitter configured to transmit a communications signal via a communications channel. The integrated circuit can also include a receiver configured to receive the communications signal via the communications channel. A jitter creation module also can form part of the integrated circuit and can introduce jitter into the system thereby allowing for on-chip jitter testing. The jitter creation module can form either part of the transmitter or receiver and can introduce the jitter by phase interpolation.