On-Chip Load Circuit for PMD IC Operational Testing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for testing optical physical media dependent integrated circuits (PMD ICs) face challenges in dynamically operating and realistically loading during high-temperature operational life and data rate increases, often trading off test relevance with complex and costly loading conditions, resulting in varying test results.
Innovation Solution
An on-chip built-in test and qualification system is developed, featuring a driver device, a load circuit with current-voltage (I-V) characteristics, and a switch that allows selection between the driver and load, enabling realistic simulation of I-V characteristics using on-chip loads and resistor networks to mimic photonic devices like VCSELs and photodiodes, facilitating operational qualification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If realistic loading conditions are used during testing, then test relevance is improved, but device complexity and cost increase
Solution Approach 1:
The patent creates an on-chip copy of the photonic device's I-V characteristics using a load circuit with transistors that replicate the electrical behavior of the actual photonic device. This allows realistic testing conditions to be achieved without requiring the complex external loading infrastructure, thereby improving test relevance while controlling device complexity
Solution Approach 2:
The patent merges the test load circuit directly onto the same chip as the driver device under test. By integrating the load circuit with the driver device through on-chip interconnects, the system achieves realistic loading conditions without external complexity, resolving the contradiction between test relevance and device complexity
2Measurement precision
If high data rates are used during testing, then operational qualification accuracy is improved, but test system complexity and cost increase
Solution Approach 1:
The patent combines the high-speed data transmission capability directly into the on-chip load circuit. The load circuit is designed to handle high data rates natively, eliminating the need for external high-speed test equipment and reducing overall test system complexity while maintaining measurement precision
Solution Approach 2:
The patent replaces external mechanical/electrical loading systems with an integrated electronic load circuit that operates at high speeds. This substitution enables high data rate testing without the complexity of external high-speed signal generation and loading equipment
3Reliability
If external loading systems are used, then realistic operating conditions are achieved, but manufacturing cost increases
Solution Approach 1:
The patent merges the load circuit with the driver device in a single integrated chip structure. This integration eliminates the need for separate external loading systems and their associated interconnects, reducing manufacturing steps, assembly complexity, and overall cost while maintaining realistic operating conditions
Solution Approach 2:
The patent creates an on-chip replica of the photonic device characteristics using transistor-based load circuits. This copying approach allows realistic operational conditions to be achieved using standard semiconductor manufacturing processes, avoiding the need for expensive external specialized loading equipment
Data Source
AI summary
Operational and functional testing of the optical Physical Media Dependent Integrated Circuits (“PMD ICs”) is achieved by constructing a switchable on-chip load with similar or equivalent electrical characteristics of a targeted photonic device.