On-Chip Memory Clock-to-Q Measurement Using McLeod Loops
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Solution Overview
Problem
Existing methods for measuring the clock-to-Q access time of memory devices are complex and require external testers to configure and trigger the McLeod Loop oscillation, which can disrupt the normal operation of the memory device and incur high logic overhead.
Innovation Solution
An integrated circuit (IC) with on-chip automation that includes a circuit coupled with the memory device to precondition it, initiate first and second oscillations, and measure the clock-to-Q access time using a finite state machine (FSM) and multiplexers, thereby reducing the complexity and logic overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external testers are used to configure and trigger McLeod Loop oscillation for measurement, then measurement capability is achieved, but device complexity and logic overhead increase
Solution Approach 1:
The memory device performs self-measurement of clock-to-Q access time using an integrated McLeod Loop oscillator and FSM within the device itself, eliminating the need for external testers to configure and trigger oscillations. The device autonomously generates oscillations, measures cycle times, and computes access time parameters.
Solution Approach 2:
The integrated circuit incorporates multiple functions within a single device: the memory device serves both as the device under test and as the measurement instrument. The FSM and multiplexers enable the same hardware to perform both normal memory operations and timing measurements, reducing overall system complexity.
2Measurement precision
If external testers configure and trigger McLeod Loop oscillation, then measurement can be performed, but disruption to normal memory device operation increases
Solution Approach 1:
The FSM is pre-configured with a sequence of states that automatically performs the necessary setup operations before measurement begins. The multiplexers are pre-positioned to route signals appropriately, so when measurement starts, the system is already prepared and can transition smoothly into measurement mode without disrupting normal operations.
Solution Approach 2:
The McLeod Loop oscillator generates periodic oscillations that are used for measurement, but these oscillations are contained within the measurement loop and do not interfere with the normal synchronous operations of the memory device. The periodic nature of the measurement process allows it to be interleaved with normal memory operations.
3Measurement precision
If external testers are used for measurement configuration, then measurement capability is provided, but logic overhead increases
Solution Approach 1:
The measurement functionality is merged with the normal memory device structure. The FSM, multiplexers, and McLeod Loop oscillator are integrated into the same IC, sharing common resources such as clock signals and data paths. This consolidation eliminates the need for separate external tester logic and reduces overall logic overhead.
Solution Approach 2:
Instead of using a complex external tester, the patent creates a simplified copy of the measurement functionality within the device itself. The FSM replicates the control logic that would otherwise be required externally, but in a more efficient on-chip implementation that reduces logic overhead.
Data Source
AI summary
An integrated circuit (IC) may include a memory device and a circuit coupled with the memory device. The circuit may precondition the memory device to sustain oscillations, initiate first oscillations in a first loop that includes the memory device, and initiate second oscillations in a second loop that does not include the memory device.