On-Chip MIM Capacitor Structure for Power Impedance Suppression
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Solution Overview
Problem
Conventional electronic devices face challenges in suppressing high-frequency power supply impedance, leading to inaccurate signal generation due to noise interference, which is exacerbated by the complex and costly manufacturing processes of integrating decoupling capacitors within through-silicon interposers.
Innovation Solution
A capacitor structure is directly formed on an electronic component using a metal-insulator-metal (MIM) diode technique, where a first metal layer is electrically connected with electrode pads and an insulating layer, and a second metal layer is coupled with the first metal layer without contact, minimizing manufacturing complexity and cost while optimizing impedance suppression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decoupling capacitors are integrated into the through-silicon interposer using conventional methods (conductive openings with dielectric filling and electroplating), then impedance suppression effect is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent extracts the capacitor structure from the conventional TSV manufacturing process. Instead of creating capacitors through dielectric filling and electroplating in conductive openings during TSV fabrication, the invention forms a separate capacitor structure with first and second metal layers connected via conductive components after the TSVs are established. This separation removes the complex dielectric filling and electroplating steps from the TSV manufacturing flow, reducing overall process complexity while maintaining impedance suppression functionality.
Solution Approach 2:
The capacitor structure is segmented into distinct components: a first metal layer, a second metal layer, and conductive components connecting them. This segmentation allows each component to be manufactured using simpler, more cost-effective processes rather than requiring the integrated complex process of conventional capacitor formation within TSVs. The segmented approach enables independent optimization of each component's manufacturing process.
2Reliability
If decoupling capacitors are integrated into the through-silicon interposer using conventional methods (dielectric filling and electroplating), then impedance suppression effect is improved, but manufacturing cost increases
Solution Approach 1:
The patent extracts the capacitor structure from the conventional TSV manufacturing process. Instead of creating capacitors through dielectric filling and electroplating in conductive openings during TSV fabrication, the invention forms a separate capacitor structure with first and second metal layers connected via conductive components after the TSVs are established. This separation removes the complex dielectric filling and electroplating steps from the TSV manufacturing flow, reducing overall process complexity while maintaining impedance suppression functionality.
Solution Approach 2:
The patent employs a manufacturing approach that uses simpler, more cost-effective materials and processes for creating the capacitor structure. By using metal layers and conductive components that can be formed through standard semiconductor fabrication processes rather than requiring specialized dielectric filling and electroplating equipment, the invention reduces manufacturing costs while achieving the required electrical performance for impedance suppression.
3Reliability
If decoupling capacitors are integrated into the through-silicon interposer using conventional methods (electroplating and dielectric filling), then impedance suppression effect is improved, but production yield decreases
Solution Approach 1:
The patent extracts the capacitor structure from the conventional TSV manufacturing process. Instead of creating capacitors through dielectric filling and electroplating in conductive openings during TSV fabrication, the invention forms a separate capacitor structure with first and second metal layers connected via conductive components after the TSVs are established. This separation removes the complex dielectric filling and electroplating steps from the TSV manufacturing flow, reducing overall process complexity while maintaining impedance suppression functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and complexity while ensuring the decoupling capacitor is closer to the semiconductor chip, effectively suppressing impedance and minimizing noise, achieving impedance values less than 0.058x, thereby improving signal accuracy.
Implementation Method 1
a capacitor structure formed on the electronic component and exposed from the active face, wherein the capacitor structure includes a first metal layer disposed on the electronic component and electrically connected with the plurality of electrode pads, an insulating layer disposed on the first metal layer, and a second metal layer disposed on the insulating layer and electrically coupled with the first metal layer
Data Source
AI summary
An electronic module is provided, in which a first metal layer, an insulating layer and a second metal layer are sequentially formed on side faces and a non-active face of an electronic component to serve as a capacitor structure, where the capacitor structure is exposed from an active face of the electronic component so that by directly forming the capacitor structure on the electronic component, a distance between the capacitor structure and the electronic component is minimized, such that the effect of suppressing impedance can be optimized.