On-Chip Network Routing for Image Data via Spatial Tags
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Solution Overview
Problem
Current computational physical simulations and animations require significant computational resources that often exceed available computing power, particularly in real-time applications like video and image processing, leading to inefficiencies in data processing and routing across multi-core chips.
Innovation Solution
The method involves transforming image data from camera space to reference space and tagging each data sample with corresponding coordinates for self-routing across an on-chip network, allowing data samples to be efficiently assigned to processing cores without the need for a separate program or shared memory fetching, using a multi-core chip with a mesh network and switches configured for distribution rules based on spatial coordinates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional data processing methods are used for computational physical simulations, then computational power requirements are met, but processing speed and efficiency are insufficient
Solution Approach 1:
The patent segments image data into individual data samples with coordinates, routing each sample to specific processing cores based on its spatial location. This segmentation enables parallel processing across multiple cores, increasing overall productivity while distributing the computational load to meet power requirements.
Solution Approach 2:
The patent introduces a spatial coordinate dimension for data routing, transforming traditional sequential processing into a multi-dimensional approach where data is routed based on x,y coordinates across a mesh network. This dimensional addition enables more efficient data distribution and processing speed improvement.
2Productivity
If data is routed through shared memory, then data can be accessed by multiple cores, but routing efficiency and speed are reduced
Solution Approach 1:
The patent extracts the data routing function from shared memory access and implements it directly through the mesh network switches. Each switch is configured with distribution rules that directly route data samples to target cores based on coordinates, eliminating the time-consuming shared memory fetching process.
Solution Approach 2:
The patent implements self-routing where data samples carry their own coordinate information and are automatically directed to the correct processing cores through the mesh network. This eliminates the need for centralized routing control or shared memory mediation, significantly reducing routing time.
3Ease of operation
If separate programs are used for data routing, then routing control is flexible, but computational overhead increases
Solution Approach 1:
The patent merges the data routing function with the hardware infrastructure by configuring switches directly with distribution rules based on coordinates. This eliminates the need for separate software routing programs, reducing computational overhead while maintaining routing flexibility through hardware-level control.
Solution Approach 2:
The patent replaces software-based routing control with hardware-based switching control. The mesh network switches are configured with distribution rules that automatically route data based on coordinates, substituting the need for complex software programs with simpler hardware-level mechanisms.
Data Source
AI summary
A network of switches may be adapted to route image data to one or more processor cores based on tags associated with data samples, where each tag includes at least one reference-space coordinate value. When image data is received by the network, the image data may be spatially transformed to a reference space, e.g., the physical space that is represented by the image data, to generate the data samples and each data sample may be tagged with a corresponding reference space coordinate value and routed through the network to one or more of the processors according to the tag.


