On-Chip Logic Sensor for Dynamic Power Supply Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing techniques for monitoring power supply noise, such as voltage droop, in semiconductor chips are inaccurate due to their analog nature and off-chip measurement methods, which can alter the measurement results and fail to detect noise sources effectively.
Innovation Solution
An on-chip sensor using in-situ logic that shares a common power supply with the chip's functional logic, employing a series of inverters to generate a pulse signal reflecting operational delay, allowing for the measurement of dynamic power supply noise by evaluating the pulse width and using statistical methods to account for jitter and uncertainty.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If off-chip measurement techniques are used, then measurement capability is provided, but measurement accuracy deteriorates due to additional capacitances and coupling effects
Solution Approach 1:
The measurement function is extracted from external off-chip equipment and integrated directly into the chip as on-chip sensor logic. This removes the measurement circuitry from the external environment where coupling effects and additional capacitances would degrade accuracy, allowing direct measurement of power supply noise at its source without interference from external circuitry
Solution Approach 2:
A delayed clock signal serves as an intermediary to trigger the in-situ logic operation at a controlled time offset from the functional logic. This intermediary signal enables precise timing control of the measurement operation without directly coupling external measurement equipment to the power supply being measured, thus avoiding the harmful coupling effects
2Measurement precision
If ring oscillator is used for measurement, then on-chip measurement capability is provided, but measurement reliability deteriorates because it cannot distinguish voltage variation from other IC conditions
Solution Approach 1:
The measurement function is segmented into separate in-situ logic operation and measurement capture, rather than relying on a single ring oscillator frequency measurement. The in-situ logic performs a specific operation whose delay is captured and measured separately, allowing the measurement system to isolate and attribute timing changes specifically to power supply voltage variations affecting that logic operation
Solution Approach 2:
The patent uses timing/delay changes as an indicator (analogous to color change) to reflect power supply noise effects. The operational delay of the in-situ logic changes in response to voltage droop, and this delay variation serves as the measurable indicator of power supply noise, providing a reliable and interpretable signal for noise detection
3Measurement precision
If in-situ logic shares common power supply with functional logic, then measurement accuracy is improved, but device complexity increases
Solution Approach 1:
The in-situ logic is designed to perform operations that are functionally equivalent or similar to the functional logic it monitors. This allows the sensor logic to use the same design patterns, cells, and implementation techniques as the functional logic, reducing overall device complexity while maintaining measurement accuracy through shared power supply coupling
Data Source
AI summary
An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured.