On-Chip Non-Volatile Storage for Microprocessor Reliability Data
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Solution Overview
Problem
Current high-end server designs with redundant computational units and reliability engines face challenges in recovering quickly from failures, as reliability data is often lost during power downs, and external logs require specialized software to analyze, making diagnostics difficult, especially when failures are caused by software.
Innovation Solution
Implementing an on-chip non-volatile storage device to store selected reliability information, which is accessible even during overall microprocessor chip failures, allowing for faster recovery and diagnostics by an off-chip device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external software logs are used to store reliability information, then data can be preserved after power down, but specialized software is required to analyze the data and diagnostic complexity increases
Solution Approach 1:
The patent introduces an on-chip non-volatile storage device as an intermediary between the reliability engine and external systems. This mediator stores reliability information locally on the chip, eliminating the need for external software logs and complex analysis software while preserving data after power down.
Solution Approach 2:
The patent extracts the storage function from external software logs and relocates it to an on-chip non-volatile storage device. This separation removes the dependency on external software for data preservation, simplifying the overall system while maintaining reliability.
2Reliability
If redundant computational units and reliability engines are added, then system reliability is improved, but recovery time increases when serious failures occur
Solution Approach 1:
The patent implements preliminary action by pre-storing reliability information in non-volatile memory before failures occur. When serious failures happen, this pre-stored information is immediately available for analysis, eliminating the time loss associated with data collection and enabling faster recovery.
3Reliability
If specialized controllers and reliability engines are used, then reliability functionality is enhanced, but data is lost when the chip loses power
Solution Approach 1:
The patent changes the parameter of data storage from volatile to non-volatile. By using non-volatile storage technology, the system maintains reliability functionality while preventing data loss during power down events, as the storage medium retains information without power.
4Quantity of substance
If external server logs are used for failure analysis, then data can be stored, but diagnostic precision decreases when failures are caused by software
Solution Approach 1:
The on-chip non-volatile storage device serves as an intermediary that captures reliability information directly at the source, preserving software state and diagnostic data that would otherwise be lost. This local mediator ensures high diagnostic precision by storing information closer to the failure point.
Data Source
AI summary
Mechanisms are provided for use with a microprocessor chip, for storing selected reliability information in an on-chip non-volatile storage device. An on-chip reliability controller coupled to one or more on-chip resources of the microprocessor chip, collects raw reliability information from the one or more on-chip resources of the microprocessor chip. The on-chip reliability controller analyzes the raw reliability information to identify selected reliability information for the one or more resources of the microprocessor chip. The on-chip reliability controller stores the selected reliability information in the on-chip non-volatile storage device. The on-chip non-volatile storage device stores the selected reliability information even in the event of an overall failure of the microprocessor chip in which the microprocessor chip loses power. The on-chip non-volatile storage device has an interface through which the selected reliability information is accessible by an off-chip device even in the event of an overall failure of the microprocessor chip.


