On-Chip Non-Volatile Memory for IC Failure Analysis

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Solution Overview

Problem

Conventional semiconductor devices with volatile configuration registers pose challenges for failure analysis, as configuration settings are lost upon power off, making it difficult for manufacturers to reconstruct failure conditions without additional information.

Innovation Solution

Incorporating non-volatile memory (NVM) within semiconductor chips to store configuration register settings, allowing for persistent storage and retrieval of configuration data, enabling efficient failure analysis by recording and retrieving configuration settings within the chip itself.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If volatile configuration registers are used in semiconductor devices, then device complexity is reduced and ease of manufacture is improved, but configuration settings are lost upon power off making failure analysis difficult

Engineering Contradiction:
Improveease of manufactureVSAvoidconfiguration settings
Core Design Contradiction:
Ease of manufactureVSLoss of information

Solution Approach 1:

The patent applies preliminary action by capturing and storing configuration register settings in non-volatile memory at the time of device operation, before failure occurs. This allows the configuration state to be preserved and retrieved later for failure analysis, eliminating the information loss problem while maintaining the simplicity of volatile registers during normal operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a duplicate copy of the configuration register contents and storing it in non-volatile memory. The original volatile configuration registers remain unchanged for operational use, while the copied data in non-volatile memory preserves the configuration state for later analysis without affecting device performance or complexity.

Inventive Principle:
Principle #26Copying

2Reliability

If non-volatile memory is added to store configuration settings, then failure analysis capability is improved, but device complexity increases

Engineering Contradiction:
Improvefailure analysis capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the configuration storage function from the volatile configuration registers and places it in a separate non-volatile memory structure. This extraction allows the failure analysis capability to be improved while keeping the main device logic simple, as the NVM merely stores data without participating in operational processing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The non-volatile memory structure is designed to serve multiple functions: it stores configuration settings for failure analysis, can be used for device identification, and may store diagnostic information. This multi-functionality justifies the added complexity by providing multiple benefits from a single added component.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of information

If configuration settings are stored externally, then information retention is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveinformation retentionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent merges the configuration storage function into the semiconductor device itself by integrating non-volatile memory within the chip. This combining eliminates the need for external storage components and simplifies the manufacturing process, as the NVM is fabricated using the same semiconductor processes as the rest of the device.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11334447B2Integrated circuit facilitating subsequent failure analysis and methods useful in conjunction therewith
Publication Date: 2022.05.17 NUVOTON
  • US11334447B2 patent drawing
  • US11334447B2 patent drawing

AI summary

A chip aka integrated circuit, the chip comprising configuration register/s, typically volatile, and/or at least one on-chip non-volatile memory m typically including at least one reserved memory location, which may be reserved for storing contents of at least one typically volatile configuration register r, from among the configuration registers; and/or apparatus configured for, at least once, storing values which may be indicative of content of at least one typically volatile configuration register r from among the registers, e.g. in the on-chip non-volatile memory m, e.g. at the at least one reserved memory location.