On-Chip Sensor Detects PCB Tampering via PDN Impedance
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Solution Overview
Problem
Conventional anti-tamper solutions for cryptographic devices are costly and incompatible with legacy systems, and existing on-chip sensors have limited applicability and poor performance in detecting physical tampering beyond the chip level.
Innovation Solution
An on-chip circuit-based sensor that employs power integrity analysis using embedded network analyzers on FPGAs to characterize the impedance of the power distribution network (PDN) from board to chip level, enabling continuous monitoring and detection of various tampering events by stimulating the PDN with different frequencies and measuring voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tamper-proof enclosures are used to prevent and detect physical access to the system, then security is improved, but manufacturing cost increases and compatibility with legacy systems is lost
Solution Approach 1:
The patent replaces mechanical tamper-proof enclosures with an electrical/electronic detection system. The sensor circuit measures electrical characteristics (impedance, capacitance, resistance) of the PCB to detect tampering, substituting the need for physical secure enclosures with an electrical field-based detection approach that is more cost-effective and compatible with legacy systems.
Solution Approach 2:
The patent introduces an intermediary sensor circuit that indirectly detects tampering by measuring electrical characteristics of the PCB rather than directly detecting physical access. This intermediary measurement approach allows detection of tampering events without requiring physical barriers or enclosures.
2Reliability
If conventional on-chip sensors are used to detect physical tampering, then detection capability is provided, but applicability is limited and performance is poor for detecting tampering beyond chip level
Solution Approach 1:
The patent extends detection from the chip level to the board level by measuring electrical characteristics across the entire PCB. Instead of being confined to on-chip sensors, the system measures impedance, capacitance, and resistance of the entire power distribution network, adding a spatial dimension to the detection capability.
Solution Approach 2:
The sensor circuit is designed to detect multiple types of tampering events (component removal, probe connections, PCB modifications) using the same electrical measurement principles. The system can detect various classes of tamper events from board to chip level, providing universal applicability across different tampering scenarios.
3Reliability
If physical attacks are mounted on cryptographic devices, then security breaches occur, but the devices require strong cryptography to maintain secrecy and integrity
Solution Approach 1:
The patent implements preliminary detection of tampering attempts before they can compromise cryptographic operations. The sensor circuit continuously monitors electrical characteristics and detects tampering events (probe connections, component modifications) before attackers can execute side-channel or fault injection attacks, allowing preventive action to be taken.
Solution Approach 2:
The patent converts the electrical characteristics that attackers might exploit into detection signals. By measuring impedance, capacitance, and resistance changes caused by physical tampering, the system turns the electrical effects of attacks into beneficial detection mechanisms that reveal attacker presence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively detects sophisticated tampering attempts, including component additions/removals, probe connections, and IC package modifications, with high precision, without requiring modifications to the tested system, thereby enhancing the security of electronic systems.
Implementation Method 1
employes power integrity analysis using embedded network analyzers on FPGAs to characterize the impedance of the power distribution network (PDN)
Implementation Method 2
The sensor, which may be implemented on the PCB, characterizes an electrical model of a power distribution network (PDN) of the circuit board by successive measurements of electrical characteristics, such as impedance, capacitance and resistance
Data Source
AI summary
A method for detecting physical attacks on a computing device includes embedding a sensor or FPGA (Field Programmable Gate Array) on a circuit board for gathering a frequency response of a power distribution network providing power to the circuit board. During operation of the circuit board, the sensor identifies and gathers a frequency response suspected of resulting from a tamper effort, and compares the identified frequency response to a frequency response of tempering events. Based on the comparison, a determination of tampering is made.


