On-chip Power Sequence Validator for IC Debugging

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Solution Overview

Problem

Debugging power sequence issues in integrated circuits is cumbersome and time-consuming, often resulting in undetected malfunctions and failures, especially when marginally failing or out-of-sequence power rails are involved.

Innovation Solution

A system with control logic that monitors and validates power rails during power sequences, generating pass or fail indicators and storing them in registers for external analysis, allowing for efficient identification of power rail failures and compliance with voltage and timing criteria.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If oscilloscopes and logic analyzers are used for power rail failure analysis, then failure analysis capability is provided, but the process becomes painstaking and lengthy

Engineering Contradiction:
Improvefailure analysis capabilityVSAvoiddebugging time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements preliminary monitoring and validation of power rails during power sequences by embedding control logic that continuously tracks voltage levels and timing parameters. The system pre-validates power sequence compliance and captures pass/fail indicators before failures occur, eliminating the need for post-failure analysis with external instruments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The integrated circuit performs self-diagnosis by incorporating internal monitoring logic that automatically detects power sequence failures, captures diagnostic information in registers, and provides pass/fail indications without requiring external oscilloscopes or logic analyzers. The system serves its own debugging needs through built-in validation mechanisms.

Inventive Principle:
Principle #25Self-service

2Reliability

If traditional power sequence monitoring is used, then power rail status can be checked, but marginally failing rails and out of sequence rails go undetected

Engineering Contradiction:
Improvepower rail status monitoringVSAvoiddetection accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent implements continuous feedback monitoring where the control logic repeatedly samples power rail voltage levels and timing parameters during power sequences. The system compares actual measurements against expected values and generates immediate pass/fail feedback indicators, enabling detection of marginally failing rails and out-of-sequence conditions that traditional methods miss.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces manual inspection methods with automated electronic monitoring that continuously tracks power rail parameters. The control logic electronically measures voltage levels, timing intervals, and sequence compliance, providing precise detection of failures that human operators using traditional instruments would miss.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If power sequence failures are not properly indicated, then system operation is maintained, but failures go undetected causing malfunction

Engineering Contradiction:
Improvesystem operation continuityVSAvoidfailure detection
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent uses distinct visual indicators (analogous to color changes) to communicate power sequence status. The control logic generates clear pass/fail indications that can be visually distinguished, allowing operators to immediately identify successful power sequences versus failures without ambiguity. This immediate visual feedback ensures failures are detected while system operation is maintained.

Inventive Principle:
Principle #32Color changes

Data Source

PatentUS10254811B2On-chip power sequence validator and monitor
Publication Date: 2019.04.09 ADVANCED MICRO DEVICES INC
  • US10254811B2 patent drawing
  • US10254811B2 patent drawing
  • US10254811B2 patent drawing

AI summary

Systems, apparatuses, and methods for monitoring power rails during power sequences are disclosed. An apparatus includes one or more voltage regulators, a plurality of registers, and control logic. The control logic is configured to monitor a power rail generated by a voltage regulator. The control logic generates and stores an indication of pass or failure in a first register for the power rail during a power sequence. The control logic enables the first register to be read by an external device subsequent to completion of the power sequence. In another embodiment, the control logic generates a pass indicator if the power rail is less than a first voltage value on a first boundary of a timing interval and if the power rail is greater than a second voltage value on a second boundary of the timing interval. Otherwise, a fail indicator is generated.