On-Chip Reference Circuit for Low-Noise Charge Redistribution ADCs

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Solution Overview

Problem

Existing analog to digital converters with switched capacitor charge redistribution digital to analog converters face inefficiencies due to the need for external reference voltage circuits, leading to high current consumption and inaccuracy caused by parasitic inductance and noise from bond wires and printed circuit board tracks.

Innovation Solution

A reference circuit that brings the storage of the reference voltage on-chip, using a storage capacitor and a voltage modification circuit to compare and correct the reference voltage, allowing partial or complete powering down during ADC operation, thereby bypassing external inductance and reducing noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an external reference voltage circuit is used with bond wires and printed circuit board tracks, then the reference voltage can be supplied to the converter, but parasitic inductance and noise are introduced causing inaccuracy

Engineering Contradiction:
Improvereference voltage accuracyVSAvoidparasitic inductance and noise
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The reference voltage storage function is extracted from the external circuit and placed on-chip within the integrated circuit. The storage capacitor is positioned inside the IC, removing the need for external bond wires and PCB tracks that introduce parasitic inductance and noise, thereby improving reference voltage accuracy

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The reference circuit including the storage capacitor is nested within the integrated circuit package. The reference voltage generation and storage functionality is embedded inside the IC structure, eliminating external connections and their associated parasitic elements

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If a reference voltage buffer is used to maintain reference voltage, then the reference voltage can be maintained, but current consumption increases and offset and noise are introduced

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The reference circuit operates in periodic phases including an acquisition phase where the storage capacitor is charged and a correction phase where voltage accuracy is restored. This periodic operation allows the buffer to be depowered during certain stages, reducing overall current consumption while maintaining reference voltage stability when needed

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The circuit discards the continuous operation mode of the reference buffer and recovers reference voltage stability through periodic correction phases. The storage capacitor holds the reference voltage during intervals when the buffer is powered down, and the correction phase restores accuracy without requiring continuous buffer operation

Inventive Principle:
Principle #34Discarding and recovering

3Measurement precision

If the reference circuit operates continuously to maintain reference voltage, then accuracy is maintained, but current consumption is high

Engineering Contradiction:
Improvereference voltage accuracyVSAvoidcurrent consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The reference circuit switches between active correction phases and standby modes with the storage capacitor holding voltage. This periodic operation maintains reference voltage accuracy through intermittent correction while significantly reducing average current consumption compared to continuous operation

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The storage capacitor serves itself by maintaining the reference voltage during intervals when the active circuitry is powered down. The capacitor autonomously holds the voltage without requiring continuous power from the buffer, enabling the circuit to service its own reference voltage needs during standby periods

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces current consumption and improves accuracy by maintaining a stable reference voltage on-chip, minimizing the impact of parasitic inductance and noise, and allowing for more efficient operation of the analog to digital converter.

Implementation Method 1

a storage capacitor for storing the reference voltage

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a voltage modification circuit for comparing the reference voltage stored on the storage capacitor with the reference signal

Methodology Applied
Scientific EffectVoltage comparison: Electric Field

Data Source

PatentUS8552897B1Reference circuit suitable for use with an analog to digital converter and an analog to digital converter including such a reference circuit
Publication Date: 2013.10.08 ANALOG DEVICES INC
  • US8552897B1 patent drawing
  • US8552897B1 patent drawing
  • US8552897B1 patent drawing

AI summary

A reference circuit for use with a charge redistribution analog to digital converter, having a capacitor array, the reference circuit comprising: an input for receiving a signal; an output for supplying a reference voltage to at least one capacitor of the charge redistribution capacitor array; a storage capacitor for storing the reference voltage; a voltage modification circuit for comparing the reference voltage stored on the storage capacitor with the reference signal, and based on the comparison to supply a correction so as to reduce a difference between the reference voltage and the reference signal, the correction being applied during a correction phase; and a first switch for selectively connecting the storage capacitor to the input during an acquisition phase.