On-Chip Relay Circuitry for Power-over-Network Signal Integrity
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Solution Overview
Problem
Traditional power-over-Ethernet devices rely on off-chip relay circuitry, increasing costs and the likelihood of signal degradation during device detection, which affects the robustness and efficiency of power supply.
Innovation Solution
The integration of on-chip relay and switching circuitry that utilizes test signals to minimize signal loss and efficiently switch between states, using charge-pump circuits and transistors to maintain a closed-switch state with minimal load capacitance and power supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If relay circuitry is implemented off-chip, then device detection and power supply function is achieved, but device size and cost increase
Solution Approach 1:
The patent integrates relay circuitry and switching circuitry onto a single semiconductor chip, merging previously separate off-chip components with the network device. This integration reduces overall device size and volume while maintaining the detection and power supply functions, directly resolving the contradiction between reliability and device size.
2Reliability
If relay circuitry is implemented off-chip, then device detection function is achieved, but manufacturing cost increases
Solution Approach 1:
By integrating relay and switching circuitry onto the same semiconductor chip as the network device, the patent reduces the number of separate components that need to be manufactured and assembled. This integration simplifies the manufacturing process, reduces assembly steps, and lowers overall manufacturing cost while maintaining detection reliability.
3Reliability
If traditional off-chip relay circuitry is used, then power supply function is achieved, but signal degradation occurs
Solution Approach 1:
The integration of relay circuitry onto the chip places the switching elements much closer to the signal sources and processing circuits. This reduced physical distance minimizes signal path length, reducing opportunities for signal degradation, interference, and noise accumulation, thereby improving power supply reliability with minimal signal loss.
Solution Approach 2:
The patent introduces charge-pump circuits as intermediary elements that actively manage signal integrity during the switching process. These charge-pump circuits compensate for signal degradation by maintaining proper voltage levels and signal quality through the relay switching action, ensuring reliable power supply detection without significant signal loss.
4Productivity
If relay circuitry switches during detection, then power supply transition is enabled, but signal loss increases
Solution Approach 1:
The charge-pump circuits serve as intermediary elements that actively compensate for signal loss during the relay switching transition. By injecting or removing controlled amounts of charge, these circuits maintain signal integrity throughout the switching process, enabling efficient power supply transition while minimizing signal degradation.
Solution Approach 2:
The patent dynamically adjusts circuit parameters during the switching process, including voltage levels and charge distribution, to optimize performance during the transition from detection mode to powered mode. These parameter changes ensure minimal signal loss while enabling efficient power supply transition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the probability of failure during device detection, enhances system robustness, and decreases the size and cost of power-over-network devices by integrating circuitry on-chip, ensuring reliable power supply with minimal signal degradation.
Implementation Method 1
the relay circuitry includes circuitry that is configured to store charge when the inputs are of one polarity, and to use the stored charged to drive the relay circuitry to a closed-switch state when the inputs are of the reverse polarity
Implementation Method 2
designed on-chip relay circuitry that is configured to relay the test signals transmitted by power-supplying devices without power and with minimal signal degradation
Implementation Method 3
The switching circuitry is configured to efficiently shut off the relay circuitry when power is supplied to the network device
Data Source
AI summary
Relay circuitry for a power-over-network device is provided. The relay circuitry allows power-supplying network devices to identify and subsequently to supply power across a network connection to the power-over-network device, thereby eliminating the need for external power sources. The relay circuitry is operative using only the signals transmitted along a data line across the network connection. The relay circuitry is integrated together with switching circuitry on-chip on the power-over-network device. The relay circuitry and switching circuitry are further designed to propagate both the test signals and the subsequent data signals prior to and after the turning on of the power-over-network device, respectively, with minimal signal degradation.