On-Chip Router Deadlock Prevention via Packet Buffering
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Solution Overview
Problem
Current inter-processor networks in high-performance computing systems face challenges in preventing deadlocks due to circular dependencies, which are often addressed by costly hardware enhancements such as multiple network layers or virtual channels, necessitating a more efficient solution.
Innovation Solution
A router with a packet processing pipeline, a dropped packet buffer, and circuits for determining and re-inserting dropped packets, allowing for temporary removal of packets from the network to prevent deadlocks while maintaining throughput and reducing latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple network layers or virtual channels are used to prevent deadlocks, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the packet handling function from the network fabric and places it within the router itself. The router autonomously determines when to drop packets and manages the dropped packet buffer locally, eliminating the need for complex network-wide coordination mechanisms like multiple network layers or virtual channels while maintaining deadlock prevention
Solution Approach 2:
The router performs self-service by autonomously monitoring its own packet processing pipeline and automatically dropping packets when congestion is detected. The hardware circuits within the router itself make the decisions and manage the buffer, eliminating the need for external monitor processors or complex centralized control mechanisms
2Device complexity
If software-based packet dropping is used with a monitor processor, then device complexity is reduced, but productivity decreases due to latency
Solution Approach 1:
The patent replaces the software-based mechanical process of interrupt handling and packet copying with a hardware-based automated mechanism. Hardware circuits within the router automatically detect congestion conditions, make dropping decisions, and manage the buffer without requiring software intervention or monitor processors, thereby eliminating processing latency while maintaining simplicity
Solution Approach 2:
The router performs preliminary action by proactively monitoring its packet processing pipeline and dropping packets before they can cause deadlock conditions. The hardware circuits continuously assess the state of the pipeline and trigger packet dropping in advance, eliminating the need for reactive software-based monitor processors that only intervene after problems arise
Data Source
AI summary
There is disclosed a router for routing data on a computing chip comprising a plurality of processing elements, the router comprising: a packet processing pipeline; a dropped packet buffer; and one or more circuits configured to: determine that a data packet in the packet processing pipeline is to be dropped; move the data packet that is to be dropped from the packet processing pipeline to the dropped packet buffer; and re-insert the dropped data packet from the dropped packet buffer into the packet processing pipeline for re-processing.