On-Chip Termination Calibration for High-Speed I/O Pins
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Solution Overview
Problem
High-speed integrated circuits with numerous I/O pins face challenges with external termination resistors, which consume board space and are costly, and require cumbersome external components to maintain signal integrity.
Innovation Solution
The implementation of on-chip termination using transistors and calibration circuits that dynamically adjust termination impedance, eliminating the need for external resistors by varying the number of enabled transistors to match impedance, thereby reducing the number of external components and simplifying circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external termination resistors are used for each I/O pin, then signal integrity is maintained, but board space consumption increases and cost increases
Solution Approach 1:
Multiple termination resistors are merged into a single shared termination resistor. The patent implements a calibration circuit that controls multiple transistors to dynamically adjust the termination impedance, allowing one physical resistor to serve multiple I/O pins instead of requiring separate resistors for each pin.
Solution Approach 2:
A single termination resistor is made universal to serve multiple I/O pins. The calibration circuit enables this one resistor to be dynamically adjusted to match the impedance of different transmission lines connected to various pins, making it a multi-functional component that replaces numerous dedicated resistors.
2Reliability
If external termination resistors are used for each I/O pin, then signal integrity is maintained, but the number of external components increases
Solution Approach 1:
Multiple termination resistors are merged into a single shared termination resistor. The patent implements a calibration circuit that controls multiple transistors to dynamically adjust the termination impedance, allowing one physical resistor to serve multiple I/O pins instead of requiring separate resistors for each pin.
Solution Approach 2:
The termination function is extracted from external components and integrated into the chip itself. The calibration circuit and transistors are implemented on-chip, eliminating the need for numerous external termination resistors and reducing component count.
3Area of stationary object
If on-chip termination is implemented, then board space is reduced and cost is lowered, but dynamic adjustment of termination impedance is required to maintain signal integrity
Solution Approach 1:
A feedback mechanism is implemented where the calibration circuit monitors transmission line characteristics and dynamically adjusts the termination impedance by controlling transistor conductive states. This feedback loop ensures that the on-chip termination maintains signal integrity across varying conditions.
Solution Approach 2:
The termination impedance is made dynamic rather than fixed. The calibration circuit adjusts the conductive states of multiple transistors in real-time to match the impedance of different transmission lines, enabling the termination to adapt to varying signal conditions and different I/O pins.
Data Source
AI summary
A circuit includes first transistors and a comparator. The comparator compares a reference signal and a signal that is based on conductive states of the first transistors. A control circuit generates first control signals based on an output signal of the comparator. The conductive states of the first transistors are determined based on the first control signals. An arithmetic circuit performs an arithmetic function based on the first control signals and second control signals to generate calibration signals. Second transistors provide a termination impedance at an external terminal of the circuit that is based on the calibration signals.